A power semiconductor device and a method of forming the same by providing a substrate (402) and then forming a voltage sustaining region on the substrate (402) by depositing an epitaxial layer (401) on the substrate (402) and forming at least one trench in the epitaxial layer (401). A barrier material is deposited along the walls of the trench and a dopant is implanted through the barrier material into a portion of the epitaxial layer (401) adjacent to and beneath the bottom of the trench. The dopant is diffused to a form a first doped layer and the barrier material is removed from at least the bottom of the trench. The trench is etched through the first doped layer and substantially filled to complete the voltage sustaining region. At least one region is formed over the voltage sustaining region to define a junction therebetween.

Method for fabricating a power semiconductor device having a floating island voltage sustaining layer

A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and forming a voltage sustaining region on the substrate. The voltage sustaiing region is formed in the following manner. First, an epitaxial layer is deposited on the substrate. The epitaxial layer has a first or a second conductivity type. Next, at least one terraced trench is formed in the epitaxial layer. The terraced trench has a trench bottom and a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls and bottom of the trench. A dopant of a conductivity type opposite to the conductivity type of the epitaxial layer is implanted through the barrier material lining the annular ledge and at the trench bottom and into adjacent portions of the epitaxial layer to respectively form at least one annular doped region and another doped region. The dopant is diffused in the annular doped region and the another doped region to cause the regions to overlap one another, whereby a continuous doped column is formed in the epitaxial layer. A filler material is deposited in the terraced trench to substantially fill the terraced trench. Finally, at least one region of conductivity type opposite to the conductivity type of the epitaxial layer is formed over the voltage sustaining region to define a junction therebetween.

Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step

A method of fabricating a high voltage power MOSFET having a voltage-sustaining region that includes doped columns (410) formed by rapid diffusion. A semiconductor device having a substrate (402), an epitaxial layer (401) and a voltage-sustaining region formed in the epitaxial layer (401), the voltage-sustaining region including columns (410) formed along at least outer sidewalls of a filled trench, the column (410) including first, second and third diffused regions, the first diffused region having a deeper junction depth than the second diffused region and the third diffused region extends from the surface of the epitaxial layer (401) to intersect one of the first and second diffused regions.

Method for fabricating a high voltage power mosfet having a voltage sustaining region that includes doped columns formed by rapid diffusion

A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A first layer of polysilicon having a second dopant of the second conductivity type is deposited in the trench. The second dopant is diffused to form a doped epitaxial region adjacent to the trench and in the epitaxial layer. A second layer of polysilicon having a first dopant of the first conductivity type is subsequently deposited in the trench. The first and second dopants respectively located in the second and first layers of polysilicon are interdiffused to achieve electrical compensation in the first and second layers of polysilicon. Finally, at least one region of the second conductivity type is formed over the voltage sustaining region to define a junction therebetween.

High voltage power mosfet having a voltage sustaining region that includes doped columns formed by trench etching and diffusion from regions of oppositely doped polysilicon

A two-terminal power diode has improved reverse bias breakdown voltage and on resistance includes a semiconductor body having two opposing surfaces and a superjunction structure therebetween, the superjunction structure including a plurality of alternating P and N doped regions aligned generally perpendicular to the two surfaces. The P and N doped regions can be parallel stripes or a mesh with each region being surrounded by doped material of opposite conductivity type. A diode junction associated with one surface can be an anode region with a gate controlled channel region connecting the anode region to the superjunction structure. Alternatively, the diode junction can comprise a metal forming a Schottky junction with the one surface. The superjunction structure is within the cathode and spaced from the anode. The spacing can be varied during device fabrication.

Power diode having improved on resistance and breakdown voltage

In this paper, a new vertical DMOS Transistor is proposed, in which floating islands are placed in the drift region. This new structure, called "FLIMOST", exhibits improved on-state performance when compared to the conventional VDMOST. For instance, for a breakdown voltage of 900 Volts, the performance is strongly improved in term of specific on-resistance (reduction of about 70% relative to the conventional structure and 40% relative to the silicon limit). Moreover the specific on-resistance theoretical limits of FLIMOST family are determined and compared to those of the "Superjunction" MOS Transistor family: this comparison shows the strong interest of the FLIMOSFET in the 200 V-1000 V breakdown voltage range.

A new generation of power unipolar devices: the concept of the FLoating islands MOS transistor (FLIMOST)

A new junction termination for high-voltage devices using a deep trench filled with dielectric, which dramatically decreases the junction-termination area, is proposed and fabricated. The termination breakdown voltage dependence on the dielectric critical electric field (E Cd) and its permittivity (?rd) is theoretically studied. Finally, the proposed junction termination is experimentally validated using BenzoCycloButene (BCB) as dielectric material. Experimental results show that the proposed termination sustains more than 1200 V with a 70-?m-width and 100- ?m-depth trench filled by BCB.

A New Junction Termination Using a Deep Trench Filled With BenzoCycloButene

In this paper, new Vertical FLI-MOSFETs dedicated to automotive applications are proposed for the first time: in these devices, only one P Floating Island is introduced in the N/sup -/ epitaxial region. In term of "specific on-resistance/breakdown voltage" trade-off, it is shown that the FLIMOSFET exhibits better performance than the conventional VDMOSFET and approaches the well-known "silicon limit". This is due to the strong reduction of access (R/sub a/.S) and drift (R/sub b/.S) resistances, because of the increase in the N/sup -/ epitaxial layer doping concentration. In other words, the FLIMOSFET appears to be one of the best Power MOSFET in low voltage applications.

Vertical N-channel FLIMOSFETs for future 12 V/42 V dual batteries automotive applications

In this work, a new design of high voltage (1200 Volts range) power superjunction MOSFET (SJMOSFET) is presented: the deep trench SJMOSFET (DT-SJMOSFET). Besides, a new junction termination, consisting in a 70 mum width and 100 mum depth trench filled by a dielectric, is proposed. Simulation results show that this junction termination exhibits the same blocking voltage capability as the base cell (central cell). In addition, the termination breakdown voltage dependence on the dielectric critical electric field (ECd) and its permittivity (epsivrd) is studied. Finally, the possibility of filling the trench termination using low dielectric polyimide such as BenzoCycloButene (BCB) is successfully approved and the Chemical Mechanical Polishing of BCB is also discussed. These experimental results represent the key steps for a future complete fabrication process of DT-SJMOSFET.

Feasibility study of a junction termination using deep trench isolation technique for the realization of DT-SJMOSFETs

Nowadays, the "on-resistance" reduction is key factor in the evolution of power devices, especially in power MOSFETs technology. In that way, innovating structures such as superjunction (SJ) [1] or floating islands (FI) [2, 3, 4] devices have been developed. Previously, a vertical N-channel FLYMOSFET, including one level of P buried layers called floating islands (introduced in the N-epitaxial region), has been successfully developed [5, 6]. In this paper, new design and process improvements provide for the first time a FLYMOSFET with two levels of FI exhibiting a low specific on-resistance (RON-S) of 4.5 mOmega.cm2 in 200 V breakdown voltage (BVdss) range which breaks the silicon limit [7]. Furthermore, a full physical and electrical characterization is presented, especially in dynamic configuration to evaluate FLYMOSFET's performances. Then a manufactured 200 V SJ product from another company is analyzed and compared to it. FLYMOSFET appears as a good alternative to 200 V SJ devices.

F. Morancho

Papers

A new generation of power unipolar devices: the concept of the FLoating islands MOS transistor (FLIMOST)

A New Junction Termination Using a Deep Trench Filled With BenzoCycloButene

Vertical N-channel FLIMOSFETs for future 12 V/42 V dual batteries automotive applications

Feasibility study of a junction termination using deep trench isolation technique for the realization of DT-SJMOSFETs

A New Optimized 200V Low On-Resistance Power FLYMOSFET