Many metal–insulator–metal systems show electrically induced resistive switching effects and have therefore been proposed as the basis for future non-volatile memories. They combine the advantages of Flash and DRAM (dynamic random access memories) while avoiding their drawbacks, and they might be highly scalable. Here we propose a coarse-grained classification into primarily thermal, electrical or ion-migration-induced switching mechanisms. The ion-migration effects are coupled to redox processes which cause the change in resistance. They are subdivided into cation-migration cells, based on the electrochemical growth and dissolution of metallic filaments, and anion-migration cells, typically realized with transition metal oxides as the insulator, in which electronically conducting paths of sub-oxides are formed and removed by local redox processes. From this insight, we take a brief look into molecular switching systems. Finally, we discuss chip architecture and scaling issues.

http://chialvo.org/Curso/UBACurso/DIA7/Papers/Aono_NatMat_07_Ionic%20Switching%20Memory.pdf

Nanoionics-based resistive switching memories

It is well-known that conventional field effect transistors (FETs) require a change in the channel potential of at least 60 mV at 300 K to effect a change in the current by a factor of 10, and this minimum subthreshold slope S puts a fundamental lower limit on the operating voltage and hence the power dissipation in standard FET-based switches. Here, we suggest that by replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation. The voltage transformer action can be understood intuitively as the result of an effective negative capacitance provided by the ferroelectric capacitor that arises from an internal positive feedback that in principle could be obtained from other microscopic mechanisms as well. Unlike other proposals to reduce S, this involves no change in the basic physics of the FET and thus does not affect its current drive or impose other restrictions.

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

The ability to control matter at the atomic scale and build devices with atomic precision is central to nanotechnology. The scanning tunnelling microscope can manipulate individual atoms and molecules on surfaces, but the manipulation of silicon to make atomic-scale logic circuits has been hampered by the covalent nature of its bonds. Resist-based strategies have allowed the formation of atomic-scale structures on silicon surfaces, but the fabrication of working devices-such as transistors with extremely short gate lengths, spin-based quantum computers and solitary dopant optoelectronic devices-requires the ability to position individual atoms in a silicon crystal with atomic precision. Here, we use a combination of scanning tunnelling microscopy and hydrogen-resist lithography to demonstrate a single-atom transistor in which an individual phosphorus dopant atom has been deterministically placed within an epitaxial silicon device architecture with a spatial accuracy of one lattice site. The transistor operates at liquid helium temperatures, and millikelvin electron transport measurements confirm the presence of discrete quantum levels in the energy spectrum of the phosphorus atom. We find a charging energy that is close to the bulk value, previously only observed by optical spectroscopy.

A single-atom transistor

With the continual increase in cooling demand for microprocessors, there has been an increased focus within the microelectronics industry on developing thermal solutions. Thermal interface materials (TIMs) play a key role in thermally connecting various components of the thermal solution. Review of the progress made in the area of TIMs in the past five years is presented. The focus is on the rheology-based modeling and design of polymeric TIMs due to their widespread use. Review of limited literature on the thermal performance of solders is also provided. Merits and demerits of using nanoparticles and nanotubes for TIM applications are also discussed. I conclude the paper with some directions for the future that I feel are relatively untouched and potentially very beneficial

https://weble.upc.edu/ifsin/Block5/paper_proc7.pdf

Thermal Interface Materials: Historical Perspective, Status, and Future Directions

Spray cooling heat transfer: The state of the art

In this paper we consider device scaling and speed limitations on irreversible von Neumann computing that are derived from the requirement of "least energy computation." We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.

/pdf/limits-to-binary-logic-switch-scaling-a-gedanken-model-3ohcpbkw4z.pdf

G.I. Bourianoff

Papers

Limits to binary logic switch scaling - a gedanken model