G
G. Romano
Researcher at University of Naples Federico II
Publications - 45
Citations - 702
G. Romano is an academic researcher from University of Naples Federico II. The author has contributed to research in topics: Power MOSFET & MOSFET. The author has an hindex of 12, co-authored 37 publications receiving 514 citations. Previous affiliations of G. Romano include Information Technology University.
Papers
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Journal ArticleDOI
A Comprehensive Study of Short-Circuit Ruggedness of Silicon Carbide Power MOSFETs
G. Romano,Asad Fayyaz,Michele Riccio,Luca Maresca,Giovanni Breglio,Alberto Castellazzi,Andrea Irace +6 more
TL;DR: In this paper, the behavior of silicon carbide (SiC) power MOSFETs under stressful short-circuit (SC) conditions is investigated and two different SC failure phenomena are thoroughly reported.
Journal ArticleDOI
SiC power MOSFETs performance, robustness and technology maturity
TL;DR: A review of commercial SiC power MOSFETs state-of-the-art characteristics is proposed and discusses trends and needs for further technology improvements, as well as device design and engineering advancements to meet the increasing demands of power electronics.
Proceedings ArticleDOI
Short-circuit failure mechanism of SiC power MOSFETs
G. Romano,Luca Maresca,Michele Riccio,Vincenzo d'Alessandro,Giovanni Breglio,Andrea Irace,Asad Fayyaz,Alberto Castellazzi +7 more
TL;DR: In this paper, failure mechanisms during short-circuit conditions of Silicon Carbide Power MOSFETs are analyzed, and a possible theoretical explanation is provided through experimental and numerical analyses.
Journal ArticleDOI
A Temperature-Dependent SPICE Model of SiC Power MOSFETs for Within and Out-of-SOA Simulations
TL;DR: In this article, a temperature-dependent SPICE model for SiC power MOSFETs is presented, which describes the static and dynamic behavior and accounts for leakage current and impact ionization.
Proceedings ArticleDOI
UIS failure mechanism of SiC power MOSFETs
Asad Fayyaz,Alberto Castellazzi,G. Romano,Michele Riccio,Andrea Irace,J. Urresti,Nicholas G. Wright +6 more
TL;DR: This paper investigates the failure mechanism of SiC power MOSFETs during avalanche breakdown under unclamped inductive switching (UIS) test regime and experimental results during UIS at failure and 2D TCAD simulation results are presented.