G
Georgi Gaydadjiev
Researcher at Imperial College London
Publications - 216
Citations - 3479
Georgi Gaydadjiev is an academic researcher from Imperial College London. The author has contributed to research in topics: Reconfigurable computing & Field-programmable gate array. The author has an hindex of 28, co-authored 206 publications receiving 3337 citations. Previous affiliations of Georgi Gaydadjiev include Delft University of Technology & Chalmers University of Technology.
Papers
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Journal ArticleDOI
The MOLEN polymorphic processor
Stamatis Vassiliadis,Stephan Wong,Georgi Gaydadjiev,Koen Bertels,Georgi Kuzmanov,Elena Moscu Panainte +5 more
TL;DR: A microarchitecture based on reconfigurable hardware emulation to allow high-speed reconfiguration and execution of the processor and to prove the viability of the proposal, the proposal was experimented with the MPEG-2 encoder and decoder and a Xilinx Virtex II Pro FPGA.
Proceedings ArticleDOI
64-bit floating-point FPGA matrix multiplication
TL;DR: A 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations and implement a scalable linear array of processing elements (PE) supporting the proposed algorithm in the Xilinx Virtex II Pro technology.
Proceedings ArticleDOI
March LR: a test for realistic linked faults
TL;DR: An overview of the most important and commonly used fault models, including the industry's popular disturb fault model, are given and a methodology to design tests for realistic linked faults is presented, resulting in the new tests March LR, March LRD and March LRDD.
Book ChapterDOI
Architectural exploration of the ADRES coarse-grained reconfigurable array
TL;DR: An architectural exploration methodology and its results for the first implementation of the ADRES architecture on a 90nm standard-cell technology are presented and an optimized architecture is derived.
Proceedings ArticleDOI
DWARV: Delftworkbench Automated Reconfigurable VHDL Generator
TL;DR: The carried experiments on the MOLEN polymorphic processor prototype suggest overall application speedups between 1.4x and 6.8x, corresponding to 13% to 94% of the theoretically achievable maximums, constituted by Amdahl's law.