A digital PID predictor controller is designed and implemented in a microprocessor. The general purpose system controller described permits the use of integer arithmetic for efficient operation with minimum throughput delay time. The stability of the system is investigated and a normalized chart for the selection of the control coefficients for a class of applications is developed. The controller has been applied to the control of a manipulator as a design example.

Design and Application of a Microprocessor PID Predictor Controller

This paper presents a reconfigurable fast Fourier transform (FFT) hardware architecture, supporting 46 different FFT sizes defined in 3GPP-LTE applications. Our proposed design concept is mainly based on combined radix-5, radix-32, and radix24 single-path delay feedback FFT design approaches. In addition, in order to elaborate our hardware design, we also develop three design techniques, such as reconfigurable processing kernel with seven types (RPK-ST), efficient FIFO management scheme, and single-table approximation method. In an ASIC implementation with TSMC 40-nm CMOS technology, our 46-mode reconfigurable FFT chip only occupies a core area of 0.36 mm2, dissipates 48.46 mW, and operates up to clock frequency of 500 MHz. As compared with the other state-of-the-art works, our work delivers high-quality design results in the aspects of area- and energy-related performance indexes, providing a constructive FFT design prototyping for 3GPP-LTE systems.

VLSI Design and Implementation of Reconfigurable 46-Mode Combined-Radix-Based FFT Hardware Architecture for 3GPP-LTE Applications

Recent advances in microprocessor technology make it possible to implement on-line modern control algorithms at reasonable cost. Self-tuning regulators can, in general, be used to regulate any industrial process and this paper describes one such implementation on a microprocessor in three different software formats, i. e., 8-bits, 32-bit floating-point, and a modified version of the 32-bit floating-point. Studies of the process control specifications and the corresponding modifications required are described.

Self-Tuning Microprocessor Universal Controller

This paper describes the control design of the electro-optical target tracking subsystem for a mobile weapon control system. Linear quadratic control laws were applied to an existing weapon system at the hardware level to optimize plant performance in the presence of certain nonlinearities and mechanical resonance constraints. This hardware approach enabled us to develop highly accurate, fast-response weapon control systems without the degrading limitations usually associated with the plant hardware.

Wideband linear quadratic control of a gyro-stabilized electro-optical sight system

A system for the on-line analysis and topographic display of human brain electrical activity which includes amplifying filtering and converter circuits for generating a plurality of signals, representing electrical activity at a plurality of predetermined data point locations on a patient's head in digital form, a first microprocessor and associated circuits to preprocess the digital signals into a predetermined format, and a second microprocessor and associated topographic map generator forming an image computation and display unit receiving the preprocessed digital signals as inputs from the image computation and display unit the topographic mag generator defining a map of a plan or elevation view of the brain containing a plurality of pixel points far in excess of the number of data points and interpolating the digital signals, so as to provide a value for each pixel on the map and providing the pixel information as outputs in synchronism with a horizontal and vertical scan, and a video monitor receiving the output of the image computation and display unit as an input.

Microcomputer based system for performing fast Fourier transforms

An industrial process control system based on a general-purpose microprocessor is described. The system employs the M6800 microprocessor, RAM, ROM, PROM, and peripheral interfaces in the hardware portion. Software includes an algorithm incorporating proportional, integral, and derivative control functions, plus multiplication, conversion, and timing sub-routines, and performance evaluation routines. An electronic analog to an industrial plant is controlled by the system. The performance of the controller with several plant models, control criteria, and sampling intervals is investigated.

A Microprocessor-Based Control System

On the basis of four common criteria?integral square error (ISE), integral absolute error (IAE), time integral-square-error (ITSE), and time integral absolute error (ITAE)?optimal lines for typical sampled data servo drives for computer numerical control (CNC) are derived and approximated by simple equations. The objective is to provide the control engineer with a simple equation for the selection of the control parameters. A line of critical damping is also derived and simply approximated.

Optimum Setting for Proportional Controller

A high-performance FFT processor based on a microprogrammable microprocessor is described here. The system processes a 256-point complex transform in less than 5.3 ms and is capable of processing a variable length (4 to 256, radix-2) complex transform. The system uses fixed point arithmetic, and each complex piece of data consists of a 16-bit 2's complement real part and a 16-bit 2's complement imaginary part. The hardware consists of Intel 3000-bit-slice microprocessor, TRW's multiplier chip (MPY 16A-J), input and output RAM's, control PROM's, and some TTL logic.

A High-Performance Microprocessor-Based FFT Processor

THIS BIBLIOGRAPHY was searched in January 1982, and is focused on eight topical areas in selected intersection believed to be of primary interest to membership of the Industrial Electronics Society. The search was made using the DIALOG Information Retrieval Service on the COMPENDEX database covering the period 1970 through 1981 and the INSPEC database covering the period 1969 through 1981.

A Focused Bibliography on Robotics

The fast Fourier transformer described is a random logic implementation of the Radix 2 decimation-in-time algorithm. A 256-point complex time slice can be transformed into a 256-point complex frequency spectrum in less than 5.3 ms. All of the 1024 multiplications and 2048 additions are performed in a single computational unit in block floating point, two's-complement arithmetic. The complex multiplications are performed using the Liu-Peled method which directly results in the final complex product without determining the intermediate products.

H. W. Mergler

Papers

A Microprocessor-Based Control System

Optimum Setting for Proportional Controller

A High-Performance Microprocessor-Based FFT Processor

A Focused Bibliography on Robotics

High-Performance Fast Fourier Transformer