Showing papers by "Heng-Da Cheng published in 2000"

A hierarchical approach to color image segmentation using homogeneity

Abstract: In this paper, a novel hierarchical approach to color image segmentation is studied. We extend the general idea of a histogram to the homogeneity domain. In the first phase of the segmentation, uniform regions are identified via multilevel thresholding on a homogeneity histogram. While we process the homogeneity histogram, both local and global information is taken into consideration. This is particularly helpful in taking care of small objects and local variation of color images. An efficient peak-finding algorithm is employed to identify the most significant peaks of the histogram. In the second phase, we perform histogram analysis on the color feature hue for each uniform region obtained in the first phase. We successfully remove about 99.7% singularity off the original images by redefining the hue values for the unstable points according to the local information. After the hierarchical segmentation is performed, a region merging process is employed to avoid over-segmentation. CIE(L*a*b*) color space is used to measure the color difference. Experimental results have demonstrated the effectiveness and superiority of the proposed method after an extensive set of color images was tested.

Thresholding using two-dimensional histogram and fuzzy entropy principle

Abstract: This paper presents a thresholding approach by performing fuzzy partition on a two-dimensional (2-D) histogram based on fuzzy relation and maximum fuzzy entropy principle. The experiments with various gray level and color images have demonstrated that the proposed approach outperforms the 2-D nonfuzzy approach and the one dimensional (1-D) fuzzy partition approach.

Design of a configurable accelerator for moment computation

Abstract: The method of moments is one of the most powerful techniques for image analysis. However, real-time applications of this method have been prohibited due to the computational intensity in calculating the moments. This paper presents a novel configurable hardware accelerator for expediting the moment computation. The fundamental building block of the proposed accelerator is a custom-designed floating-point moment processing element (MPE). Running at 75 MHz, the MPE can provide a 12X speedup over a 166 MHz TMS320C6701 digital signal processor. On top of this, a linear performance boost can be obtained by connecting up to eight MPEs into a one-dimensional (1-D) array.