H
Heyung-Sub Lee
Researcher at Samsung
Publications - 8
Citations - 41
Heyung-Sub Lee is an academic researcher from Samsung. The author has contributed to research in topics: Layer (electronics) & Etching (microfabrication). The author has an hindex of 3, co-authored 8 publications receiving 41 citations.
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Patent
Method for manufacturing poly-crystal sillicon having high resistance
TL;DR: In this article, a method for manufacturing polycrystalline silicon having high resistance, having a first step for depositing a poly-crystaline silicon layer for a resistor area over a silicon semiconductor substrate, a second step for growing a first thermal oxide layer having a specified depth over the poly-cell, ion-implanting with the nitrogen thereon, and growing a second thermal oxide on the ion-implanted layer, and a third step for forming a resistor pattern of the polycelline silicon with a photo etching method.
Patent
Method of making semiconductor devices having ohmic contact
TL;DR: In this article, the reduction in contact resistance between each layer when bringing a silicide layer into contact with a polycrystalline-silicon (polysilicon) layer in the manufacture of semiconductor devices is discussed.
Patent
Method of manufacturing high resistance polycrystalline silicon
TL;DR: In this article, a method for manufacturing polycrystalline silicon having high resistance, having a first step for depositing a poly-crystaline silicon layer for a resistor area over a silicon semiconductor substrate, a second step for growing a first thermal oxide layer having a specified depth over the poly-cell, ion-implanting with the nitrogen thereon, and growing a second thermal oxide on the ion-implanted layer, and a third step for forming a resistor pattern of the polycelline silicon with a photo etching method.
Patent
Verfahren zur herstellung von polykristallinem silizium mit hohem widerstandswert
TL;DR: In this article, it was shown that the resistance of polycrystalline silicon is dependent upon the amount of the nitride component, and a high value of resistance may be achieved.
Patent
Method of making semiconductor device having ohmic contact
TL;DR: In this paper, a method aiming to achieve a reduction in contact resistance between layers when a silicide layer 13 is brought into contact with a polycrystalline-silicon (polysilicon) layer 18 in the manufacture of semiconductor devices, is disclosed.