There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Wide bandgap semiconductors show superior material properties enabling potential power device operation at higher temperatures, voltages, and switching speeds than current Si technology. As a result, a new generation of power devices is being developed for power converter applications in which traditional Si power devices show limited operation. The use of these new power semiconductor devices will allow both an important improvement in the performance of existing power converters and the development of new power converters, accounting for an increase in the efficiency of the electric energy transformations and a more rational use of the electric energy. At present, SiC and GaN are the more promising semiconductor materials for these new power devices as a consequence of their outstanding properties, commercial availability of starting material, and maturity of their technological processes. This paper presents a review of recent progresses in the development of SiC- and GaN-based power semiconductor devices together with an overall view of the state of the art of this new device generation.

A Survey of Wide Bandgap Power Semiconductor Devices

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

https://iopscience.iop.org/article/10.1088/0268-1242/28/7/074011/pdf

Gallium nitride devices for power electronic applications

In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were examined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance (Ron) and a high breakdown voltage (Vb).

GaN Power Transistors on Si Substrates for Switching Applications

We have demonstrated n-channel gallium nitride (GaN) MOSFETs using a selective area growth (SAG) technique and ion implantation on a silicon substrate. Both MOSFETs realized good normally off operations. The MOSFET using the SAG technique showed a large drain current of 112 mA/mm, a lower leakage current, and a high field mobility of 113 cm2/V . s, which is, to our knowledge, the best for a GaN MOSFET on a silicon substrate.

Normally Off n-Channel GaN MOSFETs on Si Substrates Using an SAG Technique and Ion Implantation

The high-temperature operation of a GaN MOSFET is reported. The MOSFETs were operated up to 250 °C, best reported to date. The MOSFETs showed good dc characteristics with field-effect mobilities of 138 cm 2 /Vs and 133 cm 2 /Vs at room temperature and 250 °C, respectively. The field-effect mobility, threshold voltage, and sub-threshold slope did not changed significantly up to 250 °C. Also, we compared the activation annealing condition for n + layer fabrication. A high-temperature annealing condition of 1300 °C led to a low contact resistance, but caused slight degradation of the field-effect mobility compared with the 1100 °C annealing condition.

High-temperature enhancement mode operation of n-channel GaN MOSFETs on sapphire substrates

The interface quality in GaN metal-oxide-semiconductor (MOS) capacitors was dramatically improved by annealing after SiO 2 deposition. The interface state density (D it ) of samples annealed at 900-1000 °C was estimated to be ∼2 x 10" cm -2 ev -1 at 0.2 eV under the conduction band based on the calculation of the Terman method. Using this SiO 2 , it is expected that GaN MOSFETs can be operated.

High-quality SiO2/GaN interface for enhanced operation field-effect transistor

We report on the demonstration of enhancement-mode n-channel GaN-based hybrid MOS-HFETs realized on AlGaN/GaN heterostructure on silicon substrates with a large drain current operation. The GaN-based hybrid MOS HFETs realized the threshold voltage of 2.8 V, the maximum drain current of over 70 A with the channel width of 340 mm. This is the best value for an enhancement-mode GaN-based FET. The specific on-state resistance was 16.5 mΩcm2. The breakdown voltage was over 500 V. These results suggest that this structure is a good candidate for power switching applications.

Enhancement-mode GaN hybrid MOS-HFETs on Si substrates with Over 70 A operation

We investigated normally off operation GaN metal–oxide–semiconductor field effect transistors (MOSFETs). The drain current of GaN MOSFETs with a gate width of 1 mm increased from 0.004 to 0.1 A by which the channel length decreased from 100 to 2 µm. However, the on-resistance was increased by shortening a channel length. In addition, the drain current of GaN MOSFETs with the channel length of 4 µm was increased from 0.08 A to more than 2.2 A, by which the channel width was increased from 1 to 16 mm. As a result, we achieved normally off operation GaN MOSFETs with the highest operation temperature of 250 °C. The drain current was 2.2 A at Vg=+14 V. The threshold voltage (Vth) was +3 V.

Hiroshi Kambayashi

Papers

Normally Off n-Channel GaN MOSFETs on Si Substrates Using an SAG Technique and Ion Implantation

High-temperature enhancement mode operation of n-channel GaN MOSFETs on sapphire substrates

High-quality SiO2/GaN interface for enhanced operation field-effect transistor

Enhancement-mode GaN hybrid MOS-HFETs on Si substrates with Over 70 A operation

Over 2 A Operation at 250 °C of GaN Metal–Oxide–Semiconductor Field Effect Transistors on Sapphire Substrates