This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance.

http://iulian.lmn.pub.ro/wiki_iulian/bibliografie/2000_Yue200_ED.pdf

Physical modeling of spiral inductors on silicon

Due to the unprecedented growth in wireless applications over the past decade, development of low-cost solutions for RF and microwave communication systems has become of great importance. This practical new book is the first comprehensive treatment of lumped elements, which are playing a critical role in the development of the circuits that make these cost-effective systems possible. The books offers you an in-depth understanding of the different types of RF and microwave circuit elements, including inductors, capacitors, resistors, transformers, via holes, airbridges, and crossovers. Supported with over 220 equations and more than 200 illustrations, it covers the practical aspects of each element in exceptional detail. No other single volume treats this subject matter in such depth. From materials, fabrication, and analyses - to design, modeling, and physical, electrical, and thermal applications, this unique resource offers you complete coverage of the critical topics you need understand for your work in the field. Offering the most comprehensive, up-to-date body of knowledge on lumped elements, the book is an indispensable professional reference and serves as an excellent text for senior undergraduate and graduate-level courses in RF and microwave circuit design.

Lumped Elements for RF and Microwave Circuits

A wireless power system includes a power source, power receiver, and components thereof. The system can also include a parasitic antenna that can improve the coupling to the power source in various modes. The antenna can have both a variable capacitor and a variable inductor, and both of those can be changed in order to change characteristics of the matching.

Packaging and details of a wireless power device

An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

Strained-semiconductor-on-insulator device structures

We present a simple and accurate method to extract a small-signal equivalent circuit model of Si MOSFET's, based on the novel approach to determining parasitic inductances and resistances by fitting the frequency response of new analytic expressions with Z-parameters. This method is proposed to overcome the serious problem that conventional cold-FET methods cannot be applied for MOSFET's, and is also superior to the traditional optimization of the entire model parameters to fit the measured S-parameters. In particular, this technique is simple and reliable because no additional measurements are needed. The excellent correspondence is achieved between modeled and measured S-parameters from 0.5 to 39.5 GHz.

A novel approach to extracting small-signal model parameters of silicon MOSFET's

A variable monolithic inductor having a stacked spiral inductor connected with MOSFET switches is proposed and fabricated in a 0.18 /spl mu/m, one-poly-six-metal (1P6M) standard CMOS process. By controlling a voltage of the MOSFET switch, the proposed three-stacked inductor demonstrates a continuously variable inductance of from 8 to 23 nH at 2.4 GHz, and due to its stacked structure, it takes less than 50% of the chip area compared with conventional single layer inductors. With its compact size and variable inductance feature, the proposed variable inductor is a prospective key component for the multiband RF circuits such as electrically controllable matching circuits and wide tuning range voltage controlled oscillators (VCOs).

Variable inductance multilayer inductor with MOSFET switch control

We present the extensive experimental results and their detailed analysis showing the important effects of layout parameters on the frequency responses of quality factor (Q) of rectangular spiral inductors, which are fabricated on a silicon substrate by using conventional silicon CMOS technology, in order to determine the desirable values of layout parameters for designing the high Q inductors used in RF IC's applications. Analysis of the inductors on Si substrates with three kinds of resistivities has been performed by tailoring the geometric layout and varying the metal thickness. Using these results, the substrate effects on RF performance of inductors are also investigated by observing the frequency responses of Q with varying the substrate resistivity in detail.

The detailed analysis of high Q CMOS-compatible microwave spiral inductors in silicon technology

The authors' aim is to demonstrate the possibility of building high quality factor (Q) integrated inductors in the conventional complementary metal-oxide semiconductor (CMOS) process without any additional processes of previous papers, such as thick gold layer or multilayer interconnection. The comparative analysis is extensively carried out to investigate the detailed variation of Q performance according to inductor shape and substrate by varying the substrate resistivity with circular and rectangular shape. The high Q of nearly 12 is achieved from the fabricated inductors with 2 /spl mu/m metal thickness on the 2 k/spl Omega//spl middot/cm silicon substrate using the CMOS process.

High Q CMOS-compatible microwave inductors using double-metal interconnection silicon technology

Disclosed is a stacked variable inductors manufactured by stacking M (M≧2) metal layers on a semiconductor substrate, and provides stacked variable inductors comprising, 1 to N inductors continuously connected in serial, wherein each of said inductors is formed on N (N≦M) metal layers that are different each other; first and second ports each connected to the highest positioned inductor and to the lowest positioned inductor among said 1 to N inductors; and at least one MOSFET, and wherein one terminal of at least one MOSFET is connected to one of the first and second ports, and the other one is connected to one of adjacent terminals connected in serial between 1 to N inductors.

Hyun Kyu Yu

Papers

A novel approach to extracting small-signal model parameters of silicon MOSFET's

Variable inductance multilayer inductor with MOSFET switch control

The detailed analysis of high Q CMOS-compatible microwave spiral inductors in silicon technology

High Q CMOS-compatible microwave inductors using double-metal interconnection silicon technology

Stacked variable inductor