Process gas discharged from a bypass pipe to a gas exhaust system can be prevented from diffusing back to the inside of a process chamber without having to install a dedicated vacuum pump at the downstream side of the bypass pipe. The substrate processing apparatus includes a process chamber accommodating a substrate, a gas supply system supplying process gas from a process gas source to the process chamber for processing the substrate, a gas exhaust system configured to exhaust the process chamber, two or more vacuum pumps installed in series at the gas exhaust system, and a bypass pipe connected between the gas supply system and the gas exhaust system. The most upstream one of the vacuum pumps is a mechanical booster pump, and the bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the mechanical booster pump.

Substrate Processing Apparatus

Embodiments of the present invention relate to an apparatus and method of plasma assisted deposition by generation of a plasma adjacent a processing region. One embodiment of the apparatus comprises a substrate processing chamber including a top shower plate, a power source coupled to the top shower plate, a bottom shower plate, and an insulator disposed between the top shower plate and the bottom shower plate. In one aspect, the power source is adapted to selectively provide power to the top shower plate to generate a plasma from the gases between the top shower plate and the bottom shower plate. In another embodiment, a power source is coupled to the top shower plate and the bottom shower plate to generate a plasma between the bottom shower plate and the substrate support. One embodiment of the method comprises performing in a single chamber one or more of the processes including, but not limited to, cyclical layer deposition, combined cyclical layer deposition and plasma-enhanced chemical vapor deposition; plasma-enhanced chemical vapor deposition; and/or chemical vapor deposition.

Apparatus and method for plasma assisted deposition

An apparatus and method for performing a cyclical layer deposition process, such as atomic layer deposition is provided. In one aspect, the apparatus includes a substrate support having a substrate receiving surface, and a chamber lid comprising a tapered passageway extending from a central portion of the chamber lid and a bottom surface extending from the passageway to a peripheral portion of the chamber lid, the bottom surface shaped and sized to substantially cover the substrate receiving surface. The apparatus also includes one or more valves coupled to the gradually expanding channel, and one or more gas sources coupled to each valve.

Gas delivery apparatus for atomic layer deposition

Embodiments of the invention provide an apparatus configured to form a material during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a lid assembly for conducting a vapor deposition process within a process chamber is provided which includes an insulation cap and a plasma screen. In one example, the insulation cap has a centralized channel configured to flow a first process gas from an upper surface to an expanded channel and an outer channel configured to flow a second process gas from an upper surface to a groove which is encircling the expanded channel. In one example, the plasma screen has an upper surface containing an inner area with a plurality of holes and an outer area with a plurality of slots. The insulation cap may be positioned on top of the plasma screen to form a centralized gas region with the expanded channel and a circular gas region with the groove.

Apparatus and process for plasma-enhanced atomic layer deposition

A method of forming a boride layer for integrated circuit fabrication is disclosed. In one embodiment, the boride layer is formed by chemisorbing monolayers of a boron-containing compound and one refractory metal compound onto a substrate. In an alternate embodiment, the boride layer has a composite structure. The composite boride layer structure comprises two or more refractory metals. The composite boride layer is formed by sequentially chemisorbing monolayers of a boron compound and two or more refractory metal compounds on a substrate.

Formation of boride barrier layers using chemisorption techniques

Integrated circuit devices include a first dielectric layer, an electrically insulating layer on the first dielectric layer and an an aluminum oxide buffer layer formed by atomic layer deposition (ALD) and stabilized by heat treatment at a temperature of less than about 600° C., between the first dielectric layer and the electrically insulating layer. The first dielectric layer may comprise a high dielectric material such as a ferroelectric or paraelectric material. The electrically insulating layer may also comprise a material selected from the group consisting of silicon dioxide, borophosphosilicate glass (BPSG) and phosphosilicate glass (PSG). To provide a preferred integrated circuit capacitor, a substrate may be provided and an interlayer dielectric layer may be provided on the substrate. Here, a metal layer may also be provided between the interlayer dielectric layer and the first dielectric layer. The metal layer may comprise a material selected from the group consisting of Pt, Ru, Ir, and Pd.

Integrated circuit devices having buffer layers therein which contain metal oxide stabilized by heat treatment under low temperature

A capacitor having high capacitance using a silicon-containing conductive layer as a storage node, and a method for forming the same, are provided. The capacitor includes a storage node, an amorphous Al2O3 dielectric layer, and a plate node. The amorphous Al2O3 layer is formed by a method in which reactive vapor phase materials are supplied on the storage node, for example, an atomic layered deposition method. Also, the storage node is processed by rapid thermal nitridation before forming the amorphous Al2O3 layer. The amorphous Al2O3 layer is densified by annealing at approximately 850° C. after forming a plate node, to thereby realize the equivalent thickness of an oxide layer which approximates a theoretical value of 30 Å.

Capacitor for a semiconductor device and method for forming the same

A deposition rate of a dielectric material is varied with the electrical polarity of an underlying layer to obtain excellent deposition and planarization characteristics A conductive layer and the underlying dielectric are surface-treated to have different electrical polarities so that the dielectric is formed by using the difference of deposition rates of the dielectric material between that on the conductive layer and that on the underlying dielectric A CVD apparatus having a DC power source connected between a susceptor and a gas injection portion thereof is provided The deposition and planarization can be performed at low temperatures and are simplified in process

Method of forming a dielectric layer

Method for forming a capacitor of a semiconductor device

PROBLEM TO BE SOLVED: To easily realize high level integration of an integrated circuit device, by constituting a buffer film which consists of a metal oxide film stabilized by a lower temperature treatment at a temperature equal to or lower than a specified temperature, is formed between a film containing a ferroelectric film and an insulating film, and prevents mutual action between both the films. SOLUTION: A contact hole which is formed in an interlayer insulating film 110 and exposes an impurity region 108 of a substrate 100 is filled with a polycrystalline silicon film, and a contact plug 112 is formed. A first buffer film pattern 114, a lower electrode pattern 116, a ferroelectric film pattern 118 of high permittivity and an upper electrode pattern 120 are formed in this order on the interlayer insulating film 110 in which the contact plug 112 is formed, and a capacitor is constituted. A second buffer film 122 is formed on the whole surface of the completed capacitor, and an insulating film 124 is formed on the second buffer film 122. It is constituted of a metal oxide film which is stabilized by low temperature treatment at a temperature equal to or lower than 600 deg.C. Thereby high level integration of an integrated circuit device is easily enabled.

In-seon Park

Papers

Integrated circuit devices having buffer layers therein which contain metal oxide stabilized by heat treatment under low temperature

Capacitor for a semiconductor device and method for forming the same

Method of forming a dielectric layer

Method for forming a capacitor of a semiconductor device

Integrated circuit device having buffer film constituted of metal oxide film which is stabilized by low temperature treatment, and its manufacture