An active matrix electroluminescent display device has an array of current-driven electroluminescent display elements (20), for example comprising organic electroluminescent material, whose operations are each controlled by an associated switching means (10) to which a drive signal for determining a desired light output is supplied in a respective address period and which is arranged to drive the display element according to the drive signal following the address period. Each switching means comprises a current mirror circuit (24, 25, 30, 32) which samples and stores the drive signal with one transistor (24) of the circuit controlling the drive current through the display element (20) and having its gate connected to a storage capacitance (30) on which a voltage determined by the drive signal is stored. Through the use of current mirror circuits improved uniformity of light outputs from the display elements in the array is obtained.

Active matrix electroluminescent display device

Embodiments of the present invention relate to an apparatus and method of plasma assisted deposition by generation of a plasma adjacent a processing region. One embodiment of the apparatus comprises a substrate processing chamber including a top shower plate, a power source coupled to the top shower plate, a bottom shower plate, and an insulator disposed between the top shower plate and the bottom shower plate. In one aspect, the power source is adapted to selectively provide power to the top shower plate to generate a plasma from the gases between the top shower plate and the bottom shower plate. In another embodiment, a power source is coupled to the top shower plate and the bottom shower plate to generate a plasma between the bottom shower plate and the substrate support. One embodiment of the method comprises performing in a single chamber one or more of the processes including, but not limited to, cyclical layer deposition, combined cyclical layer deposition and plasma-enhanced chemical vapor deposition; plasma-enhanced chemical vapor deposition; and/or chemical vapor deposition.

Apparatus and method for plasma assisted deposition

An apparatus and method for performing a cyclical layer deposition process, such as atomic layer deposition is provided. In one aspect, the apparatus includes a substrate support having a substrate receiving surface, and a chamber lid comprising a tapered passageway extending from a central portion of the chamber lid and a bottom surface extending from the passageway to a peripheral portion of the chamber lid, the bottom surface shaped and sized to substantially cover the substrate receiving surface. The apparatus also includes one or more valves coupled to the gradually expanding channel, and one or more gas sources coupled to each valve.

Gas delivery apparatus for atomic layer deposition

Ergonomic systems which provide medical therapy, comfort and enhanced function are provided. Surfaces are provided with adjustable contour, transient force damping and temperature. The technologies are applied to footwear, seating surfaces an cryotherapy devices. The cooling and cryotherapy system employ an evaporator in close proximity to skin, and therefore employ methods to reduce risk of frostbite. Advanced control and power supply options are disclosed.

Ergonomic systems and methods providing intelligent adaptive surfaces and temperature control

A method of forming a boride layer for integrated circuit fabrication is disclosed. In one embodiment, the boride layer is formed by chemisorbing monolayers of a boron-containing compound and one refractory metal compound onto a substrate. In an alternate embodiment, the boride layer has a composite structure. The composite boride layer structure comprises two or more refractory metals. The composite boride layer is formed by sequentially chemisorbing monolayers of a boron compound and two or more refractory metal compounds on a substrate.

Formation of boride barrier layers using chemisorption techniques

An HTSC material epitaxially deposited on a YSZ buffer layer on a surface of a monocrystalline silicon substrate has a zero resistance transition temperature of at least 85° K., a transition width (10-90%) of no more than 1.0° K., a resistivity at 300° K. of no more than 300 micro-ohms-centimeter and a resistivity ratio (at 300° K./100° K.) of 3.0±0.2. The surface of the silicon substrate is cleaned using a spin-etch process to produce an atomically clean surface terminated with an atomic layer of an element such as hydrogen with does not react with silicon. The substrate can be moved to a deposition chamber without contamination. The hydrogen is evaporated in the chamber, and then YSZ is epitaxially deposited preferably by laser ablation. Thereafter, the HTSC material, such as YBCO, is epitaxially deposited preferably by laser ablation. The structure is then cooled in an atmosphere of oxygen.

Silicon substrate having an epitaxial superconducting layer thereon and method of making same

A low temperature process for dehydrogenating amorphous silicon using lasers Dehydrogenation occurs by irradiating one or more areas of a hydrogenated amorphous silicon layer with laser beam pulses at a relatively low energy density After the multiple laser pulse irradiation at a relatively low energy density, the laser energy density is increased and multiple irradiation at a higher energy density is performed If after the multiple irradiation at the higher energy density the amorphous silicon hydrogen content is still too high, dehydrogenation proceeds by multiple irradiations at a yet higher energy density The irradiation at the various energy densities can result in the formation of polysilicon due to melting of the amorphous silicon layer As irradiation may be selectively applied to the amorphous silicon, an integral amorphous silicon-polysilicon structure may be formed

Low temperature process for laser dehydrogenation and crystallization of amorphous silicon

An HTSC material epitaxially deposited on a YSZ buffer layer on a surface of a monocrystalline silicon substrate has a zero resistance transition temperature of at least 85° K., a transition width (10-90%) of no more than 1.0° K., a resistivity at 300° K. of no more than 300 micro-ohms-centimeter and a resistivity ratio (at 300° K./100° K.) of 3.0± 0.2. The surface of the silicon substrate is cleaned using a spin-etch process to produce an atomically clean surface terminated with an atomic layer of an element such as hydrogen with does not react with silicon. The substrate can be moved to a deposition chamber without contamination. The hydrogen is evaporated in the chamber, and then YSZ is epitaxially deposited preferably by laser ablation. Thereafter, the HTSC material, such as YBCO, is epitaxially deposited preferably by laser ablation. The structure is then cooled in an atmosphere of oxygen.

Silicon substrate having YSZ epitaxial barrier layer and an epitaxial superconducting layer

This invention relates to methods and applications of forming clusters of pixels in 2-D sensing and display arrays. Using TFT switches having more than one predetermined electrical characteristics. The array formed according to these teachings being used in sensing, displaying, adjusting resolution, color selection, image processing, object recognition and filtering.

Methods and applications of combining pixels to the gate and data lines for 2-D imaging and display arrays

The invention provides a buffered substrate that includes a substrate, a buffer layer and a silicon layer. The buffer layer is disposed between the substrate and the silicon layer. The buffer layer has a melting point higher than a melting point of the substrate. A polycrystalline silicon layer is formed by crystallizing the silicon layer using a laser beam.

James B. Boyce

Papers

Silicon substrate having an epitaxial superconducting layer thereon and method of making same

Low temperature process for laser dehydrogenation and crystallization of amorphous silicon

Silicon substrate having YSZ epitaxial barrier layer and an epitaxial superconducting layer

Methods and applications of combining pixels to the gate and data lines for 2-D imaging and display arrays

Buffered substrate for semiconductor devices