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Jing Zhang

Researcher at Virginia Tech

Publications -  15
Citations -  305

Jing Zhang is an academic researcher from Virginia Tech. The author has contributed to research in topics: Speedup & CUDA. The author has an hindex of 8, co-authored 15 publications receiving 279 citations.

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Journal ArticleDOI

Fast Detection of Transformed Data Leaks

TL;DR: This paper utilizes sequence alignment techniques for detecting complex data-leak patterns and achieves good detection accuracy in recognizing transformed leaks, and implements a parallelized version of the algorithms in graphics processing unit that achieves high analysis throughput.
Proceedings ArticleDOI

OpenCL and the 13 dwarfs: a work in progress

TL;DR: The goal of this combination "Work-in-Progress and Vision" paper is to delineate application requirements in a manner that is not overly specific to individual applications or the optimizations used for certain hardware platforms, so that the authors can draw broader conclusions about hardware requirements.
Proceedings ArticleDOI

Optimizing burrows-wheeler transform-based sequence alignment on multicore architectures

TL;DR: A locality-aware implementation of BWA is proposed that aims at optimizing its performance by better exploiting the caching mechanisms of modern multicore processors and can reduce last-level cache misses and translation look aside buffer misses, resulting in up to 2.6-fold speedup.
Journal ArticleDOI

cuBLASTP: Fine-Grained Parallelization of Protein Sequence Search on CPU+GPU

TL;DR: The proposed cuBLASTP, an efficient fine-grained BLASTP implementation for the GPU using CUDA, encompasses many research contributions, including memory-access reordering to reorder hits from column-major order to diagonal- major order, position-based indexing to map a hit with a packed data structure to a bin, and aggressive hit filtering to eliminate hits beyond the threshold distance along the diagonal.
Proceedings ArticleDOI

cuBLASTP: Fine-Grained Parallelization of Protein Sequence Search on a GPU

TL;DR: A fine-grained approach to parallelize BLASTP, where each individual phase of sequence search is mapped to many threads on a GPU, which reorders data-access patterns and reduces divergent branches of the most time-consuming phases.