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Showing papers by "Johann W. Kolar published in 2003"


Proceedings ArticleDOI
10 Dec 2003
TL;DR: In this article, a high power density 10 kW three-phase 12-pulse rectifier is analyzed for applications in future more electric aircrafts, which shows high efficiency and low input current harmonics for a wide operating range.
Abstract: A high power density 10 kW three-phase 12-pulse rectifier is analyzed for applications in future more electric aircrafts. The experimental results, which are in good accordance with the theory, show high efficiency and low input current harmonics for a wide operating range. Furthermore, two novel rectifier topologies, which are formed by combining the passive 12-pulse rectifier with a boost stage on the DC side are proposed. This allows to guarantee a constant output voltage and/or to overcome the problem of the dependency of output voltage on the mains voltage amplitude and output power level.

78 citations


Proceedings ArticleDOI
02 Nov 2003
TL;DR: In this paper, a gate drive circuit for a 1300 V/4 A SiC-JFET was proposed and evaluated experimentally for a switching frequency of 200 kHz, and a comparison of the switching behavior of a SiC JFET/Si-MOSFET cascode and of the SiC driven by the proposed gate drive was shown.
Abstract: In this paper, a gate drive circuit for a 1300 V/4 A SiC-JFET is proposed and evaluated experimentally for a switching frequency of 200 kHz. Furthermore, a comparison of the switching behavior of a SiC-JFET/Si-MOSFET cascode and of the SiC-JFET driven by the proposed gate drive circuit is shown.

63 citations


Proceedings ArticleDOI
15 Jun 2003
TL;DR: In this paper, the authors present a comprehensive procedure for designing a high output voltage series-parallel resonant DC-DC converter, where the system output voltage control is by a combination of duty-cycle and switching frequency variation, where soft switching is preserved over the entire operating range.
Abstract: This work presents a comprehensive procedure for designing a high output voltage series-parallel resonant DC-DC converter. The system output voltage control is by a combination of duty-cycle and switching frequency variation, where soft-switching is preserved over the entire operating range. The basic principle of operation of the converter is described and an analytical model is established which does provide a basis for the numerical calculation of the stresses on the power components. Furthermore, a control strategy for minimizing the no-load conduction losses is proposed and the transient behavior in case of load steps including output short-circuit is discussed based on digital simulations.

54 citations


Proceedings ArticleDOI
19 Feb 2003
TL;DR: In this paper, the conduction and switching losses of a three-phase very sparse AC-AC matrix converter (VSMC) supplying a permanent magnet synchronous motor are discussed in detail.
Abstract: In this paper based on experimental investigations of the power semiconductor switching behavior and on analytical calculations the conduction and switching losses of it three-phase very sparse AC-AC matrix converter (VSMC) supplying a permanent magnet synchronous motor are discussed in detail. There, 1200 V-Si-IGBTs/1200 V-Si-ultra-fast-recovery diodes and 1300 V-SiC-JFET/Si-MOSFET cascodes are employed for realizing the converter power circuit. The worst case operating conditions are identified and the efficiencies resulting in dependency of the switching frequency and load current amplitude are shown in graphical form. Furthermore, the operating range of the VSMC with respect to the maximum admissible junction temperature of the power semiconductors is determined. Finally, topics to be treated in the continuation of the research are discussed briefly.

47 citations


Proceedings ArticleDOI
02 Nov 2003
TL;DR: In this paper, the switching losses of a three-phase sparse matrix converter (SMC) operating in the lower modulation range are minimized by employing the lowest and the second largest input line-to-line voltage for the formation of the converter DC link voltage.
Abstract: The switching losses of a three-phase sparse matrix converter (SMC) operating in the lower modulation range are minimized by employing the lowest and the second largest input line-to-line voltage for the formation of the converter DC link voltage. The resulting current stresses on the power semiconductors and the switching frequency ripple RMS values of the filter capacitor voltages and output currents are calculated by digital simulation and compared to conventional modulation. Finally, a modulation scheme is introduced which allows the generation of reactive input power also for missing active power transfer via the DC link and/or purely reactive load. This is a basic requirement for operating the SMC in boost mode where the output filter capacitor voltages have to be controlled sinusoidally also for no-load operation.

46 citations


Proceedings ArticleDOI
15 Jun 2003
TL;DR: In this article, an advanced modulation scheme is proposed which does prevent the input current distortion and does allow to maintain the optimum performance of conventional modulation schemes for three-phase three-switch buck-type PWM rectifiers where the switching state of one bridge leg is clamped within a /spl Pi/3 wide interval of the mains period.
Abstract: Modulation schemes for three-phase three-switch buck-type PWM rectifiers where the switching state of one bridge leg is clamped within a /spl Pi//3-wide interval of the mains period do guarantee minimum switching losses as well as minimum input filter capacitor voltage ripple and minimum DC current ripple. However, as shown in this paper by a detailed analysis of the time behavior of the input filter capacitor voltages within a pulse period such modulation schemes are characterized by the occurrence of sliding intersections of the filter capacitor voltages which do cause input current distortion. An advanced modulation scheme is proposed which does prevent the input current distortion and does allow to maintain the optimum performance of conventional modulation schemes.

34 citations


Proceedings ArticleDOI
U. Drofenik1, Johann W. Kolar1
19 Feb 2003
TL;DR: The aim of this paper is to give an introduction into the basic theory of heat energy conduction and thermal design which should serve as an addition to the Java applets compiled in a module of the interactive educational software iPES.
Abstract: For designing reliable power electronic systems it is essential to understand basic thermal issues like the stationary and transient relation of the power semiconductor losses the junction temperature and the application of thermal equivalent circuits. Also, thermal properties are of special importance in connection with further increasing the compactness of power converter systems. The aim of this paper is to give an introduction into the basic theory of heat energy conduction and thermal design which should serve as an addition to the Java applets compiled in a the iPES-Thermal, a module of the interactive educational software iPES which is freely available at www.ipes.ethz.ch and employed at the ETH Zurich for supporting an introductory course on power electronics.

26 citations


Proceedings Article
U. Drofenik1, Johann W. Kolar1
01 Jan 2003
TL;DR: In this article, the time behavior of the power module semiconductor junction temperatures over a mains period can be calculated with high accuracy by combining simple thermal equivalent circuits and stationary thermal simulations of the cooling system.
Abstract: For realizing a three-phase 400 V/sub AC//800 V/sub DC/ 10 kW unity power factor PWM (Vienna) rectifier system a novel Si/SiC multi-chip power semiconductor modules (IXYS VUM26B) facilitating switching frequencies up to 500 kHz is employed. Direct water cooling of the modules base plates does significantly reduce the size of the cooling system. As the heat flow is directly from the power module into the water the cooling system can be realized using non-metal heat sink what does reduce common-mode EMI emissions. In this paper it is shown how the time behavior of the power module semiconductor junction temperatures over a mains period can be calculated with high accuracy by combining simple thermal equivalent circuits and stationary thermal simulations of the cooling system. Furthermore, the determination of the switching losses by circuit simulation based on experimental data is discussed and the power transistor and power diode junction temperatures are investigated for different operating points of the rectifier system.

24 citations


Proceedings Article
G. laimer1, Johann W. Kolar1
01 Jan 2003
TL;DR: In this article, a zero-ripple input filter for a three-phase PWM rectifier system is proposed, and the differential-mode characteristics of the filter and the influence on the filter on the selection of the unity gain bandwidth of the input current control is analyzed by simulations.
Abstract: The basic principles of operation and the dimensioning of 'zero'-ripple filter concepts, as known for DC/DC boost converters, is discussed. Based on this a novel 'zero'-ripple input filter for a three-phase PWM rectifier system is proposed. The differential-mode characteristics of the filter and the influence of the filter on the selection of the unity gain bandwidth of the input current control is analyzed by simulations.

21 citations


Proceedings Article
01 Jan 2003
TL;DR: In this paper, the basic principle of operation of a three-phase PWM rectifier system formed by star-connection of three single-phase three-level PWM Rectifier modules (three-level y-rectifier) is discussed based on space vector calculus.
Abstract: The basic principle of operation of a three-phase PWM rectifier system formed by star-connection of three single-phase three-level PWM rectifier modules (three-level y-rectifier) is discussed based on space vector calculus. The mains current ripple resulting for synchronized operation of the phase modules is calculated and comparatively evaluated against a direct three-phase PWM (Vienna) rectifier realization. The current stresses on the power semiconductors and on the passive power components are calculated analytically in order to provide a basis for the system dimensioning. A novel concept for controlling the y-rectifier is proposed which guarantees a symmetric loading of the phase modules and allows to continue the system operation also in case of heavily unbalanced mains voltage and/or for a failure of a mains phase. Finally, the advantages and drawbacks of the y-rectifier concept are summarized and topics of further research are identified.

18 citations


01 Jan 2003
TL;DR: A review of three-phase PWM converter topologies which do show a low complexity / high reliability and high efficiency and power density and are therefore of main interest for a future industrial application is presented in this article.
Abstract: A review of three-phase PWM converter topologies which do show a low complexity / high reliability and high efficiency and power density and are therefore of main interest for a future industrial application is presented. A three-switch/level boost-type PWM rectifier (VIENNA Rectifier), a buck+boost-type PWM rectifier with wide output voltage range and the AC/AC Sparse Matrix Converter concept are discussed in detail and topics to be treated in the course of further research are identified. Finally, it is shown how the aspects being relevant for the realization of highly compact converter systems could be integrated into education in the field.

Proceedings ArticleDOI
15 Jun 2003
TL;DR: In this article, the reliable operation of a three-phase buck-type PWM unity power factor rectifier with integrated boost output stage under heavily unbalanced mains, i.e., mains voltage unbalance, loss of one phase, short circuit of two phases or earth fault of 1 phase, was investigated theoretically and experimentally.
Abstract: In this paper the reliable operation of a three-phase three-switch buck-type PWM unity power factor rectifier with integrated boost output stage under heavily unbalanced mains, i.e. mains voltage unbalance, loss of one phase, short circuit of two phases or earth fault of one phase is investigated theoretically and experimentally. The analytical calculation of the relative on-times of the active switching states and of the DC link current reference value is treated in detail for active and deactivated boost output stage. Based on the theoretical considerations a control scheme which allows to control the system for any mains condition without change-over of the control structure is described. Furthermore, digital simulations as well as experimental results are shown which confirm the proposed control concept for different mains failure conditions and for the transition from balanced mains to a failure condition and vice versa. The experimental results are derived from a 5 kW prototype, input voltage range 208-480 V/sub rms/ line-to-line, output voltage 400 V/sub DC/ of the rectifier system, where the control is realized by a 32-bit digital signal processor.

Proceedings ArticleDOI
15 Jun 2003
TL;DR: In this article, a high-frequency isolated DC/DC converter system for the conditioning of the input voltage of a linear power amplifier is proposed, where the output voltage of the converter is varied according to output voltage to be formed by the LPA so that the voltage drop occurring across the power amplifier output transistors is reduced to low values which results in a significant increase of the total system efficiency.
Abstract: Conventional linear power amplifiers show a high output voltage quality but are characterized by high power losses and/or low power density. Therefore, there is a growing interest in increasing the efficiency of linear power amplifiers, e.g. for the realization of high power testing voltage sources. In this paper a high-frequency isolated DC/DC converter system for the conditioning of the input voltage of a linear power amplifier. The output voltage of the DC/DC converter is varied according to the output voltage to be formed by the linear power amplifier so that the voltage drop occurring across the power amplifier output transistors is reduced to low values which results in a significant increase of the total system efficiency. The control design of the DC/DC converter is for fast output voltage response according to the high large signal bandwidth of the linear power amplifier. The three-level input stage of the proposed system does allow a direct connection to the output of a three-phase three-level PWM rectifier ensuring low effects on the supplying mains. The operating principle of the proposed system is described and the design of the output voltage control is treated in detail. The resulting dynamic behavior of the system is analyzed by digital simulation. Finally, the theoretical considerations are verified by measurements on a 1.5 kW laboratory prototype.

Journal ArticleDOI
TL;DR: In this paper, the analytical results for the current stresses on the power semiconductors of the Sparse Matrix Converter Topologies (SMC, VSMC, and USMC) are proposed.
Abstract: For three-phase a.c.-a.c. power conversion a conventional matrix converter (CMC) or a d.c. side connection of a current DC link rectifier and a voltage d.c. link inverter comprising no energy storage components in the d.c. link could be employed. The combination of d.c. link converters does show a lower number of turn-off power semiconductors and, therefore, has been denoted as Sparse Matrix Converter (SMC) or Very Sparse Matrix Converter (VSMC). A limitation of the phase displacement of the current and voltage fundamentals at the input and at the output to ± π/6 does allow a further reduction of the system complexity, accordingly the respective topology has been introduced in the literature as Ultra Sparse Matrix Converter (USMC).In this paper a novel concept for the analytical calculation of the current stresses on the power semiconductors of the Sparse Matrix Converter Topologies (SMC, VSMC, and USMC) is proposed. As a comparison to a digital simulation shows, the analytical results do show a v...