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Jose Ignacio Garate

Researcher at University of the Basque Country

Publications -  27
Citations -  713

Jose Ignacio Garate is an academic researcher from University of the Basque Country. The author has contributed to research in topics: Electronics & Voltage. The author has an hindex of 8, co-authored 23 publications receiving 520 citations.

Papers
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Journal ArticleDOI

Wide-Bandgap Semiconductor HF-Oscillation Attenuation Method With Tuned Gate $RLC$ Filter

TL;DR: In this article, a simple methodology for attenuation of the negative effects of widebandgap transistor high-frequency oscillations without increasing rise and fall times is presented, based on determination of the source of feedback resonant frequency between gate and power loops using network analyzer measurement on printed circuit board and utilization of a tuned $RLC$ filter.
Proceedings ArticleDOI

Improvements of Power Supply Systems in Machine to Machine Modules and Fixed Cellular Terminals with Discontinuous Current Consumption

TL;DR: In this article, a power supply system for machine to machine (M2M) and fixed cellular terminals with discontinuous current consumption was proposed, which tries to solve the input high current peaks derived from the discontinuity current consumption of the PA.
Proceedings ArticleDOI

Mixed RF Output Power Control for Low Power Transmitters in Mobile Cellular Terminals

TL;DR: In this article, the authors proposed a more precise way of radiofrequency output power control and sensing for mobile base station transmitters without increasing the complexity of the AGC of their power amplifier.
Proceedings ArticleDOI

Analysis of impedance and current distributions in parallel IGBT design

TL;DR: By electromagnetic (EM) model simulations, layout non ideal effects for power circuits are shown in order to understand and control circuit stray elements, especially parasitic inductances, and current distributions.
Proceedings ArticleDOI

Analysis and modelling of IGBTs parallelization fundamentals

TL;DR: The objective of this article is to show and model how all the aforementioned parameters affect the behaviour and performance of a parallelized IGBT, and highlight the design keys for a successful parallelized design.