J
Junwhan Ahn
Researcher at Seoul National University
Publications - 40
Citations - 2260
Junwhan Ahn is an academic researcher from Seoul National University. The author has contributed to research in topics: Cache & CPU cache. The author has an hindex of 15, co-authored 39 publications receiving 1725 citations. Previous affiliations of Junwhan Ahn include Google.
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Proceedings ArticleDOI
A scalable processing-in-memory accelerator for parallel graph processing
TL;DR: This work argues that the conventional concept of processing-in-memory (PIM) can be a viable solution to achieve memory-capacity-proportional performance and designs a programmable PIM accelerator for large-scale graph processing called Tesseract.
Proceedings ArticleDOI
PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture
TL;DR: In this article, the authors propose a new PIM architecture that does not change the existing sequential programming models and automatically decides whether to execute PIM operations in memory or processors depending on the locality of data.
Proceedings ArticleDOI
Weighted-Entropy-Based Quantization for Deep Neural Networks
TL;DR: This paper proposes a novel method for quantizing weights and activations based on the concept of weighted entropy, which achieves significant reductions in both the model size and the amount of computation with minimal accuracy loss.
Proceedings ArticleDOI
DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture
TL;DR: This paper proposes a novel classification of dead writes, which is composed of dead-on-arrival fills, dead-value fills, and closing writes, as a theoretical model for redundant write elimination, and presents a dead write predictor based on a state-of-the-art dead block predictor.
Journal ArticleDOI
ZeNA: Zero-Aware Neural Network Accelerator
TL;DR: A CNN hardware accelerator that exploits the zero-value property to achieve significant performance and energy improvements is proposed.