Showing papers in "IEEE Design & Test of Computers in 2018"
TL;DR: A CNN hardware accelerator that exploits the zero-value property to achieve significant performance and energy improvements is proposed.
Abstract: Editor’s note: It has been observed that the majority of the kernel weights and input activations in the state-of-the-art convolution neural networks (CNNs) have zero values. This article proposes a CNN hardware accelerator that exploits this property to achieve significant performance and energy improvements. —Mustafa Ozdal, Bilkent University
94 citations
TL;DR: This article focuses on reducing a charging cost for electric vehicles (EVs) and a charging strategy is proposed to minimize the charging cost within the charging station constraints.
Abstract: This article focuses on reducing a charging cost for electric vehicles (EVs). A charging strategy is proposed to minimize the charging cost of EVs within the charging station constraints. —Zili Shao
34 citations
TL;DR: This paper surveys how VLSI testing principles can be adapted to protect ICs against hardware trojans.
Abstract: Hardware Trojans have emerged as an insidious problem in the global electronics supply chain. This paper surveys how VLSI testing principles can be adapted to protect ICs against hardware trojans.
31 citations
TL;DR: This article proposes a flow to provision FPGAs from a pool of cloud resources that can lead to more efficient sharing of limited FPGA resources by enabling FPGC development and simulation in virtual machines.
Abstract: Editor’s note: This article proposes a flow to provision FPGAs from a pool of cloud resources. The proposed flow can lead to more efficient sharing of limited FPGA resources by enabling FPGA development and simulation in virtual machines. —Mustafa Ozdal, Bilkent University
29 citations
TL;DR: This paper presents a survey regarding various aspects of designing time-critical computing systems.
Abstract: Time-critical computing systems are enablers for various important application domains, like avionics, automotive, spacecraft, IoT etc. All these applications will be benefited immensely from the design of computing systems that fulfill strict timing requirements. This paper presents a survey regarding various aspects of designing time-critical computing systems. —Partha Pande, Washington State University
25 citations
TL;DR: In this paper, the challenges and the opportunities in designing mixed-criticality systems with heterogeneous multiple-processor system-on-chip (MPSoC) architectures are discussed.
Abstract: Editor’s note: This article presents the challenges and the opportunities in designing mixed-criticality systems with heterogeneous Multiple-Processor System-on-Chip (MPSoC) architectures. —Tulika Mitra, National University of Singapore —Jurgen Teich, Friedrich-Alexander-Universitat Erlangen-Nurnberg—Lothar Thiele, ETH Zurich
21 citations
TL;DR: A scheme to bound the size of the errors with adaptive error detection and correction as an integral part of the datapath is proposed.
Abstract: Editor’s note: Approximate arithmetic units are used in error tolerant applications, like image processing, to minimize energy, and resource usage in general, by keeping accuracy to the minimum level required. However, in a datapath errors may accumulate over successive approximate operations. This article proposes a scheme to bound the size of the errors with adaptive error detection and correction as an integral part of the datapath. —Axel Jantsch, TU Wien
20 citations
TL;DR: This article provides a brief introduction to the mixed-criticality scheduling theory clearly demarcating its scope and limitations.
Abstract: This article provides a brief introduction to the mixed-criticality scheduling theory clearly demarcating its scope and limitations.
20 citations
TL;DR: A solution at CPU core level, which minimizes the possible single point of failures and additional effort is spent to mitigate the fault-recovery routines and the assisting infrastructure is introduced.
Abstract: Triple modular redundancy is an option to satisfy the strict safety requirements for autonomous driving. This article introduces a solution at CPU core level, which minimizes the possible single point of failures. Additional effort is spent to mitigate the fault-recovery routines and the assisting infrastructure. —Hans-Joachim Wunderlich, Universitat Stuttgart
19 citations
TL;DR: This paper proposes a reliable yet efficient FPGA-based security system via crypto engines and Physical Unclonable Functions (PUFs) for big data applications for cloud computing.
Abstract: Editor’s note: In cloud computing framework, the data security and protection is one of the most important aspects for optimization and concrete implementation. This paper proposes a reliable yet efficient FPGA-based security system via crypto engines and Physical Unclonable Functions (PUFs) for big data applications. Considering that FPGA or GPU-based accelerators are popular in data centers, we believe the proposed approach is very practical and effective method for data security in cloud computing. —Gi-Joon Nam, IBM Research
19 citations
TL;DR: The authors combine formal reasoning with simulation data to effectively validate safety or estimate worst case situations of automotive control systems.
Abstract: Analyzing the safety of automotive systems at the application level is -especially challenging as often very complex or even incomplete models are available. The authors combine formal reasoning with simulation data to effectively -validate safety or estimate worst case situations of automotive control systems. —Hans-Joachim Wunderlich, Universitat Stuttgart
TL;DR: This paper proposes an efficient design for testability technique for reversible logic circuits, which promises ultralow energy computation.
Abstract: Editor’s note: This paper proposes an efficient design for testability technique for reversible logic circuits, which promises ultralow energy computation. — Shreyas Sen, Purdue University
TL;DR: Ozdal et al. as discussed by the authors addressed the problem of coordination between FPGAs and multicore CPUs for big data applications by integrating FPGA accelerators with general-purpose CPUs.
Abstract: Editor’s note: FPGA accelerators integrated with general-purpose CPUs have brought opportunities to improve energy efficiency of data center workloads. This article addresses the problem of coordination between FPGAs and multicore CPUs for big data applications. —Mustafa Ozdal, Bilkent University
TL;DR: This article presents T-CREST many-core architecture specially designed and optimized for time-critical systems.
Abstract: This article presents T-CREST many-core architecture specially designed and optimized for time-critical systems. —Tulika Mitra, National University of Singapore —Jurgen Teich, Friedrich-Alexander-Universitat Erlangen-Nurnber —Lothar Thiele, ETH Zurich
TL;DR: The case for embracing temporal properties as an integral part of the modeling paradigm in cyber-physical systems design is made.
Abstract: This article makes the case for embracing temporal properties as an integral part of the modeling paradigm in cyber-physical systems design.
TL;DR: This article argues that the hardware-software contract exposed through instruction-set architecture should be extended for time-critical systems design.
Abstract: This article argues that the hardware-software contract exposed through instruction-set architecture should be extended for time-critical systems design.
TL;DR: This paper addresses application-level security of industrial control systems demonstrating that a complete solution requires a combination of design methods and technologies including trusted components, secure networks, software security, as well as effective vulnerability analysis.
Abstract: Industrial control systems (ICSs) are special purpose networked computing systems used to implement control processes and management operations. Their design, which enables realtime operation as well as continuous operation under failures, has made them attractive for the management and control of critical infrastructures, such as power, water supply, and transport infrastructures. Their increasing adoption in infrastructures has led to their exposure to attacks from various actors; such attacks, if successful, can have catastrophic results for infrastructures and cause even loss of life. Thus, their security and resilience are critical. In this paper, we provide a short description of problems and solution approaches for the security of ICSs. Considering their special purpose and their characteristics, we address application-level security demonstrating that a complete solution requires a combination of design methods and technologies including trusted components, secure networks, software security, as well as effective vulnerability analysis.
TL;DR: This paper is valuable by focusing on a commercial mobile application processor and validating the widely used models in the research community with experimental measurements using an IR camera.
Abstract: Editor’s note: Thermal issues are plaguing high-performance systems because of their high power consumption, and mobile systems because of their form factor and compactness. Researchers have developed tools and design methodologies to model, predict, and optimize thermal aspects, but it has remained a challenge to validate them against real systems. This paper is valuable by focusing on a commercial mobile application processor and validating the widely used models in the research community with experimental measurements using an IR camera. —Mircea R. Stan .
TL;DR: Strategies for stress test parallelization of burn-in test and early life failures have to be excluded to fulfill the high reliability needs of automotive electronics.
Abstract: Early life failures have to be excluded to fulfill the high reliability needs of automotive electronics. While burn-in test may be an effective technique, it is also a very significant cost factor. This article presents strategies for stress test parallelization. —Hans-Joachim Wunderlich, Universitat Stuttgart
TL;DR: Jantsch et al. as discussed by the authors reviewed the state of the art in self-testing hardware and showed how these techniques can be generalized to facilitate self-awareness in a self-aware SoC.
Abstract: Editor’s note: Self-testing hardware has a long tradition as a complement to manufacturing testing based on test stimuli and response analysis. Today, it is a mature field and many complex SoCs have self-testing structures built-in (BIST). For self-aware SoCs this is a key technology, allowing the system to distinguish between correct and erroneous behavior. This survey article reviews the state of the art and shows how these techniques are to be generalized to facilitate self-awareness. — Axel Jantsch , TU Wien — Nikil Dutt, University of California at Irvine
TL;DR: The survey of the guest editors provides a comprehensive introduction to the design process of electric vehicles and provides the necessary knowledge to understand state-of-the-art research of this special issue.
Abstract: The survey of the guest editors provides a comprehensive introduction to the design process of electric vehicles. Relevant topics such as the modeling of efficiency of the propulsion engine, optimization of the propulsion engine, runtime driving management, battery systems, and charging are introduced and provide the necessary knowledge to understand state-of-the-art research of this special issue. — Jorg Henkel, Editor in Chief
TL;DR: This article addresses the complexities of thermal management in high-performance multicore platforms by sophisticated analysis of noisy thermal sensor readings, dynamic learning to adapt to the peculiarities of the hardware and the applications, and a dynamic optimization strategy.
Abstract: Editor’s note: Thermal management in high-performance multicore platforms has become exceedingly complex due to variable workloads, thermal heterogeneity, and long, thermal transients. This article addresses these complexities by sophisticated analysis of noisy thermal sensor readings, dynamic learning to adapt to the peculiarities of the hardware and the applications, and a dynamic optimization strategy. —Axel Jantsch, TU Wien — Nikil Dutt, University of California at Irvine
TL;DR: This article presents a guideline for designing high-quality, stable control systems on shared platforms with complex timing interference among the control tasks.
Abstract: Editor’s note: This article presents a guideline for designing high-quality, stable control systems on shared platforms with complex timing interference among the control tasks. —Benoit Dupont de Dinechin, Kalray —Tulika Mitra, National University of Singapore —Jurgen Teich, Friedrich-Alexander-Universitat Erlangen-Nurnberg —Lothar Thiele, ETH Zurich
TL;DR: Experimental results demonstrate that the proposed approach increases the cycle life by 46% compared to a standard charging scheme, with consideration of both battery degradation and electricity cost.
Abstract: Charging plug-in electric vehicles (PEVs) lead to gradual degradation of battery capacity and, hence, pose a hidden cost for each charge cycle. This article proposes a novel framework to minimize the total cost of PEV charging with consideration of both battery degradation and electricity cost. Experimental results demonstrate that the proposed approach increases the cycle life by 46% compared to a standard charging scheme. —Zili Shao, The Hong Kong Polytechnic University
TL;DR: This work illustrates that complex management tasks that have to integrate multiple objectives, goals, and constraints require a comprehensive understanding of the system’s state.
Abstract: Editor’s note: Due to increasing process, voltage, and temperature (PVT) variability, reliability is becoming a growing worry. This article addresses this concern with a combination of software and hardware hardening modes while considering power, performance, and overhead constraints. Similar to other examples in this special issue, this work illustrates that complex management tasks that have to integrate multiple objectives, goals, and constraints require a comprehensive understanding of the system’s state. —Axel Jantsch, TU Wien — Nikil Dutt, University of California at Irvine
TL;DR: A multicycle logic BIST technique that avoids fault masking after multiple cycles by sequential observation using a new scan cell structure is presented.
Abstract: Power-on self-test is an efficient means for covering safety-critical faults in automotive systems. This paper presents a multicycle logic BIST technique that avoids fault masking after multiple cycles by sequential observation using a new scan cell structure. —Hans-Joachim Wunderlich, Universitat Stuttgart
TL;DR: In the past ten years, there has been some substantial development in the area of forensic data acquisition, which is summarized by the article and gives clear indications of what currently can be technically done and what cannot be done by police investigators.
Abstract: Editor’s note: You all know this from watching CSI: When a crime is committed, usually some form of digital evidence is left on devices such as computers, mobile phones, or the navigation system of a car a suspect has used. Indeed, law enforcement agencies are regularly interested in data from personal devices to find evidence, guide investigations, or even act as proof in a court of law. This tutorial article by Felix Freiling et al. mentions the San Bernadino case as a prominent example. But how do police investigators go about accessing this evidence? Is what is shown on TV realistic? Whereas, in times of classical hard disks, accessing data was quite easy due to the non- volatility of the memory device. However, this is getting increasingly difficult because of developing technologies like SSDs, other forms of flash storage, and, in particular, for volatile memory such as RAM, with the major problem being to read out data while guarding “authenticity.” In the past ten years, there has been some substantial development in the area of forensic data acquisition, which is summarized by the article. It gives clear indications of what currently can be technically done and what cannot be done by police investigators. So, if you watch CSI again and the cops need to access some digital evidence, you can tell truth from fiction. —Jurgen Teich, Friedrich-Alexander-Universitat Erlangen-Nurnberg
TL;DR: This tutorial deals with the increasing number of cyber attacks in industrial control system which lead to increasing economical damage and how to design such systems in future with the goal of higher safety and security.
Abstract: This tutorial deals with the increasing number of cyber attacks in industrial control system which lead to increasing economical damage. The authors focus on the most relevant topics including how to design such systems in future with the goal of higher safety and security. The reader will first learn the basics like the deployed architectures and system layers after which the discussion turns to design aspects, intrusion detection and prevention followed by a survey of current research trends. —Jorg Henkel, Karlsruhe Institute of Technology
TL;DR: This article shows how these contradictory expectations can be reconciled in the control of a network-on-chip based on the system’s comprehensive understanding of its state and the requirements it is subjected to.
Abstract: Editor’s note: This article identifies the contradictory needs for dynamic adaptations and full predictability in complex, exacting applications like autonomous driving. While traditional methods facilitate either dynamic adaptation or fully predictable QoS, this article shows how these contradictory expectations can be reconciled in the control of a network-on-chip based on the system’s comprehensive understanding of its state and the requirements it is subjected to. — Axel Jantsch, TU Wien — Nikil Dutt, University of California at Irvine
TL;DR: This paper shows the various side channels and approaches to mitigating these side channels in ICs and systems shown to leak sensitive information.
Abstract: Editor’s note: Side-channels in ICs and systems have been shown to leak sensitive information. This paper shows the various side channels and approaches to mitigating these side channels. —Ramesh Karri, New York University