An attempt is made to survey and assess the nonvolatile semiconductor memory devices including charge-storage devices and FET's with ferroelectric gate insulators. The charge-storage devices are further divided into two groups: 1) charges-trapping devices such as the MNOS and the MAOS, and 2) floating-gate devices such as the FAMOS and the DDC. Approaches for achieving virtual nonvolatility in otherwise volatile semiconductor memories are briefly disscused. Novel structures which provide nonvolatility as well as the theoretical limit of memory array density are also explored.

Nonvolatile semiconductor memory devices

A nonvolatile semiconductor memory device having a plurality of digit lines (GBL) to which a plurality of nonvolatile memory cells (MC) are connected and a data line (LDB) connected selectively to the digit line (GBL), the nonvolatile semiconductor memory device further comprising: a first data line (LDB) to which the selected nonvolatile memory cell (MC) is connected through the digit line (LDB) and through which a current based on memory cell information flows; a second data line (LDB) through which a reference current (Iref) flows; and a current comparing portion (D) to which the first and second data lines (LDB) are connected and which compares a current based on the memory cell information with the reference current (Iref), wherein the current comparing portion (D) includes a current load portion (52A) having a current mirror structure and a connection changing portion (QD0 to QD3) for changing a connection between the first and second data lines (LDB) and the current load portion (52A).

Publisher Summary This chapter describes the reprogrammable nonvolatile semiconductor memory devices. In the early period of development of the digital computer, the ferrite material was accepted as a gift of nature because it made the storing of large amounts of information possible and eased the construction of one of the essential parts in the computer; the memory. The requirement of high speed is met by semiconductor memories, but the low cost requirement is only in the small ones. Hence, at the moment big computers have a multilevel memory structure, in which the part (level) nearest to the CPU is made of semiconductors and the other levels are magnetic systems, such as disc and tape. Ovonics have not yet found application because of their limited number of write–erase operations, and the noncompatibility of the technology of devices and surrounding circuitry. For good charge retention in the dielectric, the dielectric layers between the storage side in the dielectric (traps, metal, or polycrystalline Si) and the outside world (gate or Si) must have high resistance.

Nonvolatile Semiconductor Memories

A nonvolatile charge-addressed memory (NOVCAM) cell is described in a 64-bit shift register configuration. The charge address is performed by a charge-coupled device (CCD) shift register and the information is stored in metal-nitride-oxide-silicon (MNOS) nonvolatile sites located in parallel with the CCD shift register. The tunneling electric field strength across the thin-oxide MNOS structure is controlled by the magnitude of the charge transferred from the CCD register. The write, erase, and read modes of operation are discussed with typical /spl plusmn/20 V 10 /spl mu/s write/erase, and 2 V 2 /spl mu/s read conditions. Readout is accomplished by parallel stabilized charge injection from a diffused p/n junction to minimize access time to the first bit.

A nonvolatile charge-addressed memory (NOVCAM) cell

The paper gives an overview on some of the most important artificial neural networks and their implementation as integrated circuits. The performances of these networks are dicussed with regard to the potential of current and future technologies. The overview closes with some possible applications of neural networks in microelectronics.

Application and Implementation of Neural Networks in Microelectronics

The volatility of information stored in a charge-coupled device can be avoided by storing the information in metal-nitride-oxide-silicon capacitors added to a CCD. In the following, the function, layout, and measured results of test circuits are described, and different layouts of such memory circuits are discussed.

K. Goser

Papers

Nonvolatile CCD memory with MNOS storage capacitors