The considerable investment in silicon technology has rarely addressed device use in harsh environments such as high temperatures, aggressive media, and radiation exposure. A clear future requirement is to save weight, volume, and reduce costs in "unfriendly" environments like high temperatures. This can be achieved either by cooling systems or by electronic microsystem components suited to withstand high temperatures. The current status of cooling systems, harsh-environment sensors, and microsystems in view of markets, realized devices, material, properties, process maturity, and packaging technologies are reviewed. Possible semiconductor candidates for high-temperature applications are discussed. The main obstacles for the future of high-temperature and harsh-environment microsystems is highlighted.

Review on materials, microsensors, systems and devices for high-temperature and harsh-environment applications

The Semiconductor Industry Association (SIA) roadmap calls for the incorporation of Cu plugs (vias) integrated with interconnects in 1997. Copper is being evaluated for ULSI metallization because of its lower bulk electrical resistivity and its superior resistance to electromigration and stress voiding as compared to commonly used aluminum and its alloys. One of the major drawbacks of Cu is its fast diffusion in Si and drift in SiO2-based dielectrics, resulting in the deterioration of devices at low temperatures. Hence a diffusion barrier is necessary between Cu and Si or SiO2. Figure 1 is a cross section ofa three metal level interconnect structure using Cu as the conductive material. The interlevel dielectrics (ILD) could be conventional SiO2-based materials or more ideally, materials with low dielectric constants such as polyimide. If conventional SiO2 is used, then Cu plugs and interconnects have to be enclosed in diffusion/drift barriers so that Cu will not move into Si or SiO2 under thermal stress or biased temperature stress (BTS).This article reviews the published studies on conductive diffusion barriers between thin Cu films and Si substrates. In addition, the work on diffusion and drift of Cu into commonly used inorganic dielectric systems is also summarized. Finally, some concerns involving diffusion/drift barriers between Cu and Si or SiO2 for sub-0.5 μm feature size with high aspect ratios are discussed.

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/S0883769400047710

Barriers Against Copper Diffusion into Silicon and Drift Through Silicon Dioxide

We demonstrate that depositing Ta diffusion barriers under ultra‐high vacuum conditions without in situ oxygen dosing allows for variations both in microstructure and in the concentration of chemical impurities that severely degrade barrier performance. The effects of deposition pressure, in situ oxygen dosing at interfaces, hydrogen and oxygen contamination, and microstructure on diffusion barrier performance to Cu diffusion for electron‐beam deposited Ta are presented. 20 nm of Ta diffusion barrier followed by a 150 nm Cu conductor were deposited under ultra‐high vacuum (UHV, deposition pressure of 1×10−9 to 5 ×10−8 Torr) and high vacuum (HV, deposition pressure of 1×10−7 to 5×10−6 Torr) conditions onto 〈100〉 Si. In situ resistance furnace measurements, Auger compositional depth profiling, secondary ion mass spectrometry, and forward recoil detection along with scanning and transmission electron microscopy were used to determine the electrical, chemical, and structural changes that occurred in thin‐film Ta diffusion barriers upon annealing. Undosed HV deposited Ta barriers failed from 560 to 630 °C, while undosed UHV barriers failed from 310 to 630 °C. For UHV Ta barriers, in situ oxygen dosing during deposition at the Cu/Ta interface increased the failure temperatures by 30–250 °C and decreased the range of failure temperatures to 570–630 °C. Undosed UHV Ta barriers have no systematic relationship between failure temperature and deposition pressure, although correlations between breakdown temperature, oxygen and hydrogen concentrations, and microstructural variations were measured.

Comparison of high vacuum and ultra‐high‐vacuum tantalum diffusion barrier performance against copper penetration

Diamond is a unique material with several outstanding physical and chemical properties. It has the highest thermal conductivity at room temperature and it is transparent from the UV to the far IR. Furthermore it has the highest hardness, the highest Young's modulus and it is chemically inert and radiation hard. These and other properties of diamond are of great interest for various commercial applications. Much progress has been made in the last decade to produce diamond with chemical vapour deposition (CVD) techniques. Today, CVD diamond plates of more than 10 cm in diameter and more than 1 mm in thickness are commercially available whose properties, especially the optical and thermal ones, are comparable to the best single-crystal diamonds. In this overview, the historical development of CVD diamond deposition with the main focus on the most important techniques, hot-filament and microwave assisted CVD, will be resumed. We describe the control of structural and morphological properties during the deposition which is a prerequisite of oriented growth and the doping of diamond which is needed for semiconductor and sensor applications. The second part of this overview will discuss optical, thermal, thermomechanical and electronic properties of single-crystal diamond and CVD diamond. Finally, we give a description of several applications such as IR windows, heatspreaders, temperature sensors, piezoresistive sensors, diodes and transistors.

https://iopscience.iop.org/article/10.1088/0034-4885/61/12/002/pdf

Growth and application of undoped and doped diamond films

Stability of silver thin films on various underlying layers at elevated temperatures

In this paper we present the initial results of work on a new class of semiconductor metallizations which appear to hold great promise as primary metallizations and diffusion barriers for high-temperature device applications. These metallizations consist of sputter-deposited films of high-T g amorphous-metal alloys which (primarily because of the absence of grain boundaries) exhibit exceptionally good corrosion resistance and low diffusion coefficients. Amorphous films of the alloys Ni-Nb, Ni-Mo, W-Si, and Mo-Si have been deposited on Si, GaAs, GaP, and various insulating substrated. The films adhere extremely well to the substrates and remain amorphous during thermal cycling to at least 500°C. Rutherford Backscattering (RBS) and Auger Electron Spectroscopy (AES) measurements indicate atomic diffusivities in the 10 -19 cm 2 /S range at 450°C.

/pdf/amorphous-metallizations-for-high-temperature-semiconductor-5dvzmrpsoa.pdf

Kang-Jin Guo

Papers

Amorphous Metallizations for High-Temperature Semiconductor Device Applications