International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

An effective approach for energy conservation in wireless sensor networks is scheduling sleep intervals for extraneous nodes, while the remaining nodes stay active to provide continuous service. For the sensor network to operate successfully, the active nodes must maintain both sensing coverage and network connectivity. Furthermore, the network must be able to configure itself to any feasible degrees of coverage and connectivity in order to support different applications and environments with diverse requirements. This paper presents the design and analysis of novel protocols that can dynamically configure a network to achieve guaranteed degrees of coverage and connectivity. This work differs from existing connectivity or coverage maintenance protocols in several key ways: 1) We present a Coverage Configuration Protocol (CCP) that can provide different degrees of coverage requested by applications. This flexibility allows the network to self-configure for a wide range of applications and (possibly dynamic) environments. 2) We provide a geometric analysis of the relationship between coverage and connectivity. This analysis yields key insights for treating coverage and connectivity in a unified framework: this is in sharp contrast to several existing approaches that address the two problems in isolation. 3) Finally, we integrate CCP with SPAN to provide both coverage and connectivity guarantees. We demonstrate the capability of our protocols to provide guaranteed coverage and connectivity configurations, through both geometric analysis and extensive simulations.

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Integrated coverage and connectivity configuration in wireless sensor networks

The n-dimensional hypercube is a highly concurrent loosely coupled multiprocessor based on the binary n-cube topology. Machines based on the hypercube topology have been advocated as ideal parallel architectures for their powerful interconnection features. The authors examine the hypercube from the graph-theory point of view and consider those features that make its connectivity so appealing. Among other things, they propose a theoretical characterization of the n-cube as a graph and and show how to map various other topologies into a hypercube. >

Topological properties of hypercubes

tions. Bootstrap has found many applications in engineering field, including artificial neural networks, biomedical engineering, environmental engineering, image processing, and radar and sonar signal processing. Basic concepts of the bootstrap are summarized in each section as a step-by-step algorithm for ease of implementation. Most of the applications are taken from the signal processing literature. The principles of the bootstrap are introduced in Chapter 2. Both the nonparametric and parametric bootstrap procedures are explained. Babu and Singh (1984) have demonstrated that in general, these two procedures behave similarly for pivotal (Studentized) statistics. The fact that the bootstrap is not the solution for all of the problems has been known to statistics community for a long time; however, this fact is rarely touched on in the manuscripts meant for practitioners. It was first observed by Babu (1984) that the bootstrap does not work in the infinite variance case. Bootstrap Techniques for Signal Processing explains the limitations of bootstrap method with an example. I especially liked the presentation style. The basic results are stated without proofs; however, the application of each result is presented as a simple step-by-step process, easy for nonstatisticians to follow. The bootstrap procedures, such as moving block bootstrap for dependent data, along with applications to autoregressive models and for estimation of power spectral density, are also presented in Chapter 2. Signal detection in the presence of noise is generally formulated as a testing of hypothesis problem. Chapter 3 introduces principles of bootstrap hypothesis testing. The topics are introduced with interesting real life examples. Flow charts, typical in engineering literature, are used to aid explanations of the bootstrap hypothesis testing procedures. The bootstrap leads to second-order correction due to pivoting; this improvement in the results due to pivoting is also explained. In the second part of Chapter 3, signal processing is treated as a regression problem. The performance of the bootstrap for matched filters as well as constant false-alarm rate matched filters is also illustrated. Chapters 2 and 3 focus on estimation problems. Chapter 4 introduces bootstrap methods used in model selection. Due to the inherent structure of the subject matter, this chapter may be difficult for nonstatisticians to follow. Chapter 5 is the most impressive chapter in the book, especially from the standpoint of statisticians. It provides real data bootstrap applications to illustrate the theory covered in the earlier chapters. These include applications to optimal sensor placement for knock detection and land-mine detection. The authors also provide a MATLAB toolbox comprising frequently used routines. Overall, this is a very useful handbook for engineers, especially those working in signal processing.

Probability and Random Processes

Sensor deployment is an important issue in designing sensor networks. We design and evaluate distributed self-deployment protocols for mobile sensors. After discovering a coverage hole, the proposed protocols calculate the target positions of the sensors where they should move. We use Voronoi diagrams to discover the coverage holes and design three movement-assisted sensor deployment protocols, VEC (vector-based), VOR (Voronoi-based), and minimax based on the principle of moving sensors from densely deployed areas to sparsely deployed areas. Simulation results show that our protocols can provide high coverage within a short deploying time and limited movement.

/pdf/movement-assisted-sensor-deployment-2yje5jpub5.pdf

Movement-assisted sensor deployment

Negative bias temperature instability (NBTI) is a key reliability issue in deep sub-micron technology nodes. Identifying NBTI induced high variability timing-critical paths in stipulated design cycle time is a real challenge for System-on-Chip (SoC) designers. Firstly, we identify those device parameters that must be considered while performing statistical simulations to estimate maximum path delays under operational aging. By using the results of statistical simulations, this paper proposes a segment-based approach that helps in identifying high variability timing-critical paths under asymmetric aging due to NBTI. Secondly, we explore the possibility of using the proposed procedure instead of using methodologies that involve worse-case static timing analysis (STA) and time expensive Monte-Carlo (MC) simulation in identifying speed-limiting paths. Experimental results show that the path delays estimated by the proposed procedure have strong correlation with Monte-Carlo estimated path delays. At the end, we demonstrate that the proposed procedure is approx 1.4 times faster than the traditional MC simulations.

Identifying high variability speed-limiting paths under aging

Sequential circuit testing is an active research area due to its applicability, its practicality, and its complexity. This paper gives an overview of the sequential automatic test pattern generation approaches and the classical and more recent design-for-testability methods. However, recent trend is to move towards synthesis-for-testability (SFT) approach. In this paper, we describe some of the work done by others as well as our current research using SFT techniques. In particular, the ability to perform SFT on large sequential circuits is discussed.

Sequential circuit testing: from DFT to SFT

This paper presents methods for detecting transistor short faults using logic level fault simulation and test generation. The paper considers two types of transistor level faults, namely strong shorts and weak shorts, which were introduced in our previous research. These faults are defined based on the values of outputs of faulty gates. The proposed fault simulation and test generation are performed using gate-level tools designed to deal with stuck-at faults, and no transistor-level tools are required. In the test generation process, a circuit is modified by inserting inverters, and a stuck-at test generator is used. The modification of a circuit does not mean a design-for-testability technique, as the modified circuit is used only during the test generation process. Further, generated test patterns are compacted by fault simulation. Also, since the weak short model involves uncertainty in its behavior, we define fault coverage and fault efficiency in three different way, namely, optimistic, pessimistic and probabilistic and assess them. Finally, experimental results for ISCAS benchmark circuits are used to demonstrate the effectiveness of the proposed methods.

Fault Simulation and Test Generation for Transistor Shorts Using Stuck-at Test Tools

Software-based delay fault self-testing of pipelined processor cores

A typical real-time application is composed of periodic tasks with hard deadline constraints. It must also service a periodic tasks that are generated in response to external and internal events. In addition to application's timing constraints, it is important that the system never violates thermal constraint due to its increasingly adverse impact on the processing platform. In this work, we propose a scheme for servicing a periodic tasks in thermally constrained hard real-time systems. We propose an algorithm, T2BS, which is a thermal extension of the Total Bandwidth Server [1]. We show that our algorithm is optimal in the sense that it meets periodic task timing constraints as well as system thermal constraints, and it supports the maximum rate of a periodic arrivals. Through extensive simulations we demonstrate the validity of theoretical results and perform the response time analysis of a periodic tasks.

Kewal K. Saluja

Papers

Identifying high variability speed-limiting paths under aging

Sequential circuit testing: from DFT to SFT

Fault Simulation and Test Generation for Transistor Shorts Using Stuck-at Test Tools

Software-based delay fault self-testing of pipelined processor cores

Thermal Extension of the Total Bandwidth Server