Khaitan Harshit

TL;DR: This paper evaluates a custom ASIC-called a Tensor Processing Unit (TPU)-deployed in datacenters since 2015 that accelerates the inference phase of neural networks (NN) and compares it to a server-class Intel Haswell CPU and an Nvidia K80 GPU, which are contemporaries deployed in the samedatacenters.

TL;DR: The Tensor Processing Unit (TPU) as discussed by the authors is a custom ASIC deployed in datacenters since 2015 that accelerates the inference phase of neural networks (NN) using a 65,536 8-bit MAC matrix multiply unit that offers a peak throughput of 92 TeraOps/second (TOPS).

TL;DR: In this paper, a computing unit consisting of a first memory bank for storing input activations and a second memory bank storing parameters used in performing computations is described, and the computing unit performs one or more computations associated with at least one element of a data array, the computations being performed by the MAC operator and comprising, in part, a multiply operation of the input activation received from the data bus and a parameter received from another memory bank.

TL;DR: In this paper, a tensor computation is performed by executing a loop nest comprising a plurality of loops, where a structure of the loop nest is defined based on one or more of the data values of the instruction.

TL;DR: In this paper, the authors present an accelerator that includes a computing unit; a first memory bank for storing input activations; and a second memory bank configured to store a sufficient amount of the neural network parameters on the computing unit to allow for latency below a specified level with throughput above aspecified level.