Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

Copper plating baths used for forming integrated circuit interconnects typically contain three or four component additive mixtures which facilitate the superfilling of via holes and trench lines during damascene plating. Extensive study over the last two decades has provided researchers with an understanding of the underlying mechanisms. The role of cuprous intermediates in the copper deposition reaction has long been acknowledged, but it is not yet fully understood. In this paper we describe the results of an electrochemical study of the interaction of the organic additives used with copper and copper ions in solution. It is shown that cuprous intermediates near the copper surface affect the overpotential and the kinetics of plating. The additives regulate the presence of cuprous species on the surface; levelers and suppressors inhibit Cu+ formation, whereas accelerating additives enhance Cu+ formation. Acceleration by the bis(sodiumsulfopropyl) disulfide (SPS) additive results from accumulation of cuprous complexes near the surface. Adsorbed cuprous thiolate [Cu(I)(S(CH2)3 SO3H)ad] is formed through interaction of Cu+ ions and SPS rather than Cu2+ and mercaptopropane sulfonic acid (MPS).

https://www.webpages.uidaho.edu/nanomaterials/research/Papers/IBM%20papers/Vol%2049,%20No%201,%202005,%20p.%203%20Vereecken-Chemistry%20of%20additives.pdf

The chemistry of additives in damascene copper plating

The ferroelectricity in fluorite-structure oxides such as hafnia and zirconia has attracted increasing interest since 2011 They have various advantages such as Si-based complementary metal oxide semiconductor-compatibility, matured deposition techniques, a low dielectric constant and the resulting decreased depolarization field, and stronger resistance to hydrogen annealing However, the wake-up effect, imprint, and insufficient endurance are remaining reliability issues Therefore, this paper reviews two major aspects: the advantages of fluorite-structure ferroelectrics for memory applications are reviewed from a material’s point of view, and the critical issues of wake-up effect and insufficient endurance are examined, and potential solutions are subsequently discussed

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/3DB31D1931EA9955AF5E300BC33891D6/S2159685918001751a.pdf/div-class-title-review-and-perspective-on-ferroelectric-hfo-span-class-sub-2-span-based-thin-films-for-memory-applications-div.pdf

Review and perspective on ferroelectric HfO2-based thin films for memory applications

Novel information processing techniques are being actively explored to overcome fundamental limitations associated with CMOS scaling. A new paradigm of adaptive electronic devices is emerging that may reshape the frontiers of electronics and enable new modalities. Creating systems that can learn and adapt to various inputs has generally been a complex algorithm problem in information science, albeit with wide-ranging and powerful applications from medical diagnosis to control systems. Recent work in oxide electronics suggests that it may be plausible to implement such systems at the device level, thereby drastically increasing computational density and power efficiency and expanding the potential for electronics beyond Boolean computation. Intriguing possibilities of adaptive electronics include fabrication of devices that mimic human brain functionality: the strengthening and weakening of synapses emulated by electrically, magnetically, thermally, or optically tunable properties of materials.In this review, we detail materials and device physics studies on functional metal oxides that may be utilized for adaptive electronics. It has been shown that properties, such as resistivity, polarization, and magnetization, of many oxides can be modified electrically in a non-volatile manner, suggesting that these materials respond to electrical stimulus similarly as a neural synapse. We discuss what device characteristics will likely be relevant for integration into adaptive platforms and then survey a variety of oxides with respect to these properties, such as, but not limited to, TaOx, SrTiO3, and Bi4-xLaxTi3O12. The physical mechanisms in each case are detailed and analyzed within the framework of adaptive electronics. We then review theoretically formulated and current experimentally realized adaptive devices with functional oxides, such as self-programmable logic and neuromorphic circuits. Finally, we speculate on what advances in materials physics and engineering may be needed to realize the full potential of adaptive oxide electronics.

Adaptive oxide electronics: A review

The non-volatile polarization of a ferroelectric is a promising candidate for digital memory applications. Ferroelectric capacitors have been successfully integrated with silicon electronics, where the polarization state is read out by a device based on a field effect transistor configuration. Coupling the ferroelectric polarization directly to the channel of a field effect transistor is a long-standing research topic that has been difficult to realize due to the properties of the ferroelectric and the nature of the interface between the ferroelectric and the conducting channel. Here, we report on the fabrication and characterization of two promising capacitor-less memory architectures.

Ferroelectric field effect transistors for memory applications.

Copper bottom-up deposition in 200 nm trenches by an acid-copper sulfate with only two additives [poly(ethylene glycol) (PEG) and Cl ] is achieved. The inhibiting effect of electrodeposition by PEG is strongly related to Cl - concentration. Secondary-ion mass spectroscopy measurements show that Cl - is consumed in the electroplating process. The explanation of bottom-up deposition realized in copper superfilling, in which the decrease of Cl - concentration causes rapid electrodeposition on trench bottoms, is verified experimentally.

/pdf/copper-bottom-up-deposition-by-breakdown-of-peg-cl-1k6a6rtwtx.pdf

Copper Bottom-up Deposition by Breakdown of PEG-Cl Inhibition

Metal–ferroelectric–insulator–semiconductor (MFIS) diodes and p-channel MFIS field-effect transistors (FETs) were fabricated and their electrical properties were characterized. These MFIS structures were formed using HfO2 as an insulating buffer layer, and SrBi2Ta2O9 (SBT) and (Bi,La)4Ti3O12 (BLT) as ferroelectric films. HfO2 buffer layers of about 8 nm physical thickness were deposited by ultrahigh-vacuum (UHV) electron-beam evaporation, then ferroelectric films of about 400 nm thickness were deposited by sol–gel spin coating. The fabricated p-channel MFIS-FETs with the SBT/HfO2 gate structure exhibited a drain current on/off ratio larger than 103 even after 30 days had elapsed. It was also found that the degradation of ferroelectricity was not pronounced even after applying 2.2×1011 bipolar pulses.

https://iopscience.iop.org/article/10.1143/JJAP.44.6218/pdf

Thirty-Day-Long Data Retention in Ferroelectric-Gate Field-Effect Transistors with HfO2 Buffer Layers

A ferroelectric memory device includes a gate electrode formed on a semiconductor body via a ferroelectric film, first and second diffusion regions being formed in the semiconductor body at respective sides of a channel region, wherein the ferroelectric film comprises a first region located in the vicinity of the first diffusion region, a second region located in the vicinity of the second diffusion region, and a third region located between the first and second regions, wherein the first, second and third regions carry respective, mutually independent polarizations

Ferroelectric memory, multivalent data recording method and multivalent data reading method

Properties of amorphous Lanthanum oxide (La2O3) film deposited by e-beam evaporation were investigated by fabricating MIS capacitors. Equivalent oxide thicknesses of 0.8 – 1.2 nm were successfully obtained. It was found that the surface morphology of La2O3 thin films is greatly improved by increasing the deposition temperature. The leakage current density was dramatically reduced by post deposition anneal at 400 600°C. The leakage currents, for example, were as small as 5.5 x 10 A/cm @ EOT=0.88 nm, and 1.7 x 10 A/cm @ EOT=1.26 nm, both at Vg=1 V, for n-type Si substrate MIS capacitors.

High Quality Ultrathin La2O3 Films for High-k Gate Insulator

Metal-ferroelectrics-semiconductor field effect transistors (MFS FETs) were fabricated using ferroelectric BaMgF4 (BMF) films epitaxially grown on Si(111) substrates and their electrical characteristics were investigated. BMF films were grown on Si(111) substrates by using MBE method, and n-channel MFS FETs were fabricated on p-type Si(111) substrates by the conventional photolithographic technique. Id-Vd and Id-Vg characteristics of an fabricated MFS FET were measured, and the threshold voltage shift was observed by applying a gate voltage. It was also demonstrated that the drain current could be gradually changed by applying positive short pulses to the gate of an MFS FET.

Fabrication and characterization of metal-ferroelectrics-semiconductor field effect transistors using epitaxial bamgf4 films grown on si(111) substrates

Koji Aizawa

Papers

Copper Bottom-up Deposition by Breakdown of PEG-Cl Inhibition

Thirty-Day-Long Data Retention in Ferroelectric-Gate Field-Effect Transistors with HfO2 Buffer Layers

Ferroelectric memory, multivalent data recording method and multivalent data reading method

High Quality Ultrathin La2O3 Films for High-k Gate Insulator

Fabrication and characterization of metal-ferroelectrics-semiconductor field effect transistors using epitaxial bamgf4 films grown on si(111) substrates