Applications of focused ion beam microscopy to materials science specimens

The preparation of transmission electron microscopy cross-section specimens using focused ion beam milling is outlined. The “liftout” and “trench” techniques are both described in detail, and their relative advantages and disadvantages are discussed. Artifacts such as ion damage to the top surface and sidewalls of the cross-section specimens, and methods of reducing them, are addressed.

Preparation of transmission electron microscopy cross-section specimens using focused ion beam milling

Focused ion beam and dual platform systems have, over the last 10 years, become a main stay of sample preparation for material analysis In this article the merits of using these systems are discussed and the three main techniques used to prepare cross-section specimens for transmission electron microscopy (TEM) are both discussed and compared with emphasis being placed on the tricks that users do to make the lamellae as thin as possible and with a minimum of damage at their sidewalls Other techniques such as serial slicing for three-dimensional reconstruction and the preparation of plan-view specimens are also summarized

Focused ion beams techniques for nanomaterials characterization.

In situ lift-out: steps to improve yield and a comparison with other FIB TEM sample preparation techniques.

Low temperature (200–600°C) annealing in the transmission electron microscope (TEM) is used to provide a significant noise reduction in phase images of focused-ion-beam-milled GaAs and Si p-n junctions recorded using off-axis electron holography, as well as increasing the measured phase shifts across the junctions. Our results suggest that annealing removes defects resulting from Ga+ implantation and reactivates dopant atoms in the thin TEM specimens. In GaAs, electrically inactive surface layer thicknesses are reduced from 80to17nm on each specimen surface after annealing at 500°C. In Si the improvement is from 25to5nm.

Improvement in electron holographic phase images of focused-ion-beam-milled GaAs and Si p-n junctions by in situ annealing

A procedure for preparing cross-sectional TEM specimens by focused ion beam etching (FIB) of specific regions on an integrated circuit chip is outlined. The investigation of the morphology, structure and local chemistry of precisely selected regions of semiconductor devices becomes increasingly important since the lateral dimensions and layer thickness of device structures are continually being reduced. The standard technique of preparing specimens for TEM, whether planar or cross-sectional, cannot select particular small regions. Some techniques and a number of tools and fixtures have been proposed which allow us to prepare TEM specimen of prespecified locations in complex devices. Most of these techniques, however, are still very difficult, tedious process and time consuming. p]A new technique has been proposed recently involving the use of FIB. The technique ensures that the preselected area of submicron scale will be located in the electron transparent section used for TEM imaging, in preparation turn-around time of about two hours. The TEM imaging of specific contacts via hole in a VLSI chip is illustrated.

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/S1946427400361565

Cross-Sectional TEM Specimen Preparation of Semiconductor Devices by Focused Ion Beam Etching

A high temperature oxide superconductor is efficiently protected from the affects of water and acids by forming a passivation layer of a fluoride. The fluoride layer comprises a fluoride composed of one or more elements composing the oxide superconductor and/or one or more elements that can compose an oxide superconductor by replacing at least in part one or more elements composing the oxide superconductor.

Protection of oxide superconductor

A method for fabricating a superconductive film composed of a RE 1 Ba 2 Cu 3 O x compound, or a (Bi.Sr.Ca.Cu.O) compound. In a first embodiment, oxides or carbonates of the component materials, namely Y 2 O 3 , BaCO 3 , and CuO are mixed in atomic ratios of 1:2:3, according to the chemical formula of RE 1 Ba 2 Cu 3 O x , and sintered to create a rhombic perovskite structure. The sintered mixture is powdered again, with added powdered amounts of Y 2 O 3 and powdered metallic Cu, and sintered. The sintered product is used as the source for an electron beam evaporator. In a second embodiment the (Bi.Sr.Ca.Cu.O) compound is formed into a sintered pellet which is composed of a mixture of one part of BiO, 3-15 parts of SrCO 3 , 4-30 parts of CaCO 3 , and 2-5 parts of CuO, in atomic ratios of Bi, Sr, Ca and Cu.

Method for fabricating superconductive film

Interfaces between two kind of substrate, a bulk silicon wafer and a laser-recrystallized Silicon-On-Insulator (SOI), and its thermally grown oxide have been studied. High resolution transmission electron microscopy (HRTEM) of cross sectional specimen shows that the roughness at the interface is atomically flat and nearly uniform for the bulk single crystal silicon and silicon oxide, while being nonuniform and rough as much as 20 nm height for the recrystallized silicon and silicon oxide interface. Consideration of interface between recrystallized silicon and silicon oxide, and the oxide surface above, the observed roughness at the interface is due to original grain boundaries of polycrystalline silicon which was used as the material for the laser recrystallized silicon formation. It is also discussed HRTEM of the interface between polycrystalline silicon and silicon oxide.

Tem Studies of Silicon-Silicon Oxide Interface Roughness

This paper describes cross-sectional transmission electron microscopy (TEM) observation on finished 3-D MOS devices, fabricated with a laser-recrystallized SOI. The laser-recrystallized SOI contained crystal defects such as micro-twinning, grain boundaries and dislocations. It is also clearly shown that the interface roughness between the gate oxide and SOI is as much as 20 nm height, in where the interface is very smooth between the gate oxide and bulk silicon.

Kyung-ho Park

Papers

Cross-Sectional TEM Specimen Preparation of Semiconductor Devices by Focused Ion Beam Etching

Protection of oxide superconductor

Method for fabricating superconductive film

Tem Studies of Silicon-Silicon Oxide Interface Roughness

Cross-Sectional TEM Study of Three-Dimensional MOS Devices