Different physics-based negative bias temperature instability (NBTI) models as proposed in the literature are reviewed, and the predictive capability of these models is benchmarked against experimental data. Models that focus exclusively on hole trapping in gate-insulator-process-related preexisting traps are found to be inconsistent with direct experimental evidence of interface trap generation. Models that focus exclusively on interface trap generation are incapable of predicting ultrafast measurement data. Models that assume strong correlation between interface trap generation and hole trapping in switching hole traps cannot simultaneously predict long-time dc stress, recovery, and ac stress and cannot estimate gate insulator process impact. Uncorrelated contributions from generation and recovery of interface traps, together with hole trapping and detrapping in preexisting and newly generated bulk insulator traps, are invoked to comprehensively predict dc stress and recovery, ac duty cycle and frequency, and gate insulator process impact of NBTI. The reaction-diffusion model can accurately predict generation and recovery of interface traps for different devices and experimental conditions. Hole trapping/detrapping is modeled using a two-level energy well model.

A Comparative Study of Different Physics-Based NBTI Models

Recent advances in experimental techniques (on-the- fly and ultrafast techniques) allow measurement of threshold voltage degradation due to negative-bias temperature instability (NBTI) over many decades in timescale Such measurements over wider temperature range (-25degC to 145degC), film thicknesses (12-22 nm of effective oxide thickness), and processing conditions (variation of nitrogen within gate dielectric) provide an excellent framework for a theoretical analysis of NBTI degradation In this paper, we analyze these experiments to refine the existing theory of NBTI to 1) explore the mechanics of time transients of NBTI over many orders of magnitude in time; 2) establish field dependence of interface trap generation to resolve questions regarding the appropriateness of power law versus exponential projection of lifetimes; 3) ascertain the relative contributions to NBTI from interface traps versus hole trapping as a function of processing conditions; and 4) briefly discuss relaxation dynamics for fast-transient NBTI recovery that involves interface traps and trapped holes

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Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation, Hole Trapping Effects, and Relaxation

The physical origin of the Negative Bias Temperature Instability (NBTI) is still under debate. In this work we analyze the single defects constituting NBTI. We introduce a new measurement technique stimulating a charging of these defects. By employing a statistical analysis of many stochastic stimulation processes of the same defect we are able to determine the electric field and the temperature dependence of these defects with great precision. Based on our experiments we present and verify a new, physics-based, quantitative model allowing a precise prediction of NBTI degradation and recovery. This model takes the stress history into account and also provides a prediction for degradation due to AC-NBTI and an understanding of the special features seen in conjunction with AC-NBTI.

The statistical analysis of individual defects constituting NBTI and its implications for modeling DC- and AC-stress

Based on the established properties of the most commonly observed defect in amorphous oxides, the E′ center, we suggest a coupled two-stage model to explain the negative bias temperature instability. We show that a full model that includes the creation of E′ centers from their neutral oxygen vacancy precursors and their ability to be repeatedly charged and discharged prior to total annealing is required to describe the first stage of degradation. In the second stage a positively charged E′ center can trigger the depassivation of P b centers at the Si/SiO 2 interface or K N centers in oxynitrides to create an unpassivated silicon dangling bond. We evaluate the new model to experimental data obtained from three vastly different technologies (thick SiO 2 , SiON, and HK) and obtain very promising results.

A two-stage model for negative bias temperature instability

One of the major reliability concerns in nanoscale very large-scale integration design is the time-dependent negative- bias-temperature-instability (NBTI) degradation. Due to the higher operating temperature and increasing vertical oxide field, threshold voltage (Vt) of PMOS transistors can increase with time under NBTI. In this paper, we examine the impact of NBTI degradation in memory elements of digital circuits, focusing on the conventional 6T-SRAM-array topology. An analytical expression for the time-dependent Vt degradation in PMOS transistors based on the empirical reaction-diffusion (RD) framework was employed for our analysis. Using the RD-based Vt model, we analytically examine the impact of NBTI degradation in critical performance parameters of SRAM array. These parameters include the following: (1) static noise margin; (2) statistical READ and WRITE stability; (3) parametric yield; and (4) standby leakage current (IDDQ). We show that due to NBTI, READ stability of SRAM cell degrades, while write stability and standby leakage improve with time. Furthermore, by carefully examining the degradation in leakage current due to NBTI, it is possible to characterize and predict the lifetime behavior of NBTI degradation in real circuit operation.

Impact of Negative-Bias Temperature Instability in Nanoscale SRAM Array: Modeling and Analysis

Negative bias temperature instability (NBTI) is studied in plasma (PNO) and thermal (TNO) Si-oxynitride devices having varying EOT. Threshold voltage shift (DeltaVT) and its field (EOX), temperature (T) and time (t) dependencies obtained from no-delay on-the-fly linear drain current (IDLIN) measurements are carefully compared to that obtained from charge pumping (CP). It is shown that thin and thick PNO and thin TNO devices show very similar NBTI behavior, which can primarily be attributed to generation of interface traps (DeltaNIT). Thicker TNO devices show different NBTI behavior, and can be attributed to additional contribution from hole trapping (DeltaNh) in pre-existing bulk traps. A physics based model is developed to explain the experimental results.

On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy?

L. Madhav

Papers

On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy?