A gallium nitride (GaN) field effect transistor can provide superior performance over a Si- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> due to its low <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state resistance and low junction capacitances. However, a GaN-based converter exhibits higher dead time loss during reverse conduction. Thus, to improve the efficiency, dead time optimization is required. This article proposes simple models for dead time optimization in a GaN-based buck converter under different load conditions. The proposed models are analytical in nature compared to the conventional models available for Si-based converters. A buck converter prototype is designed using a 100 V GaN device (GS61008P from GaN Systems) and the proposed analytical model-based dead time optimization techniques are validated experimentally. The proposed modeling techniques can be extended for other GaN-based dc–dc converters. 

Dead Time Optimization in a GaN-Based Buck Converter

First and second switch are connected in series to both terminals of a DC power source. A series circuit comprising a reactor, a primary winding of a transformer, and a capacitor connected in series, and is connected to a node between the first and second switches and one terminal of the DC power source. A rectifier smoothing circuit rectifies and smoothens a voltage generated across a secondary winding of the transformer and outputs a DC voltage. A control circuit alternately turns the first and second switches on and off. A voltage detection circuit detects the DC voltage from the rectifier smoothing circuit. A signal generation circuit generates a feedback signal from the DC voltage detected by the voltage detection circuit, and outputs the signal for turning the first and second switches on and off. A load current detection circuit detects load current contained in resonance current flowing through the capacitor.

Current resonant power supply device

The invention discloses a switching power supply device. The switching power supply device comprises an asymmetric half-bridge flyback converter and a controller; and the asymmetric half-bridge flyback converter is used for converting an input voltage into an output voltage, and comprises a main switch, an auxiliary switch, a transformer and a one-way clamping network used for controlling a negative peak value of an excitation inductive current. A controller is used for controlling the main switch, the auxiliary switch and the one-way clamping network, so that the switching power supply deviceworks in a certain working state. The switching power supply device is characterized in that when the output load current is greater than or equal to a first load current set value, the controller enables the switching power supply device to work in an asymmetric half-bridge flyback mode; and when the output load current is smaller than the first load current set value, the controller enables theswitching power supply device to work in a clamping asymmetric half-bridge flyback mode. Under the condition that the advantages of full load and heavy load high efficiency of the switching power supply device are kept, the current effective value of the power device under light load and no load can be reduced, the light load efficiency is greatly improved, and the no-load loss is reduced.

Switching power supply device

The invention discloses an LCD screen and an energy-saving control method thereof. The LCD screen comprises a liquid crystal panel, and a time sequence controller and a power supply management chip which are used for controlling the liquid crystal panel, wherein the power supply management chip can output high voltage required for turning on the liquid crystal panel and low voltage required for turning off the liquid crystal panel to the liquid crystal panel, and the time sequence controller makes the power supply management chip stop outputting the high voltage and low voltage required by the liquid crystal panel in an operating state during blanking of a frame of data, so that the liquid crystal panel is in a non-operating state. The LCD screen and the energy-saving control method thereof can effectively reduce the energy consumption of the LCD screen.

LCD screen and energy-saving control method thereof

A Capacitorless and Low‐Optical‐Flicker AC Direct LED Driving IC and System Applied to Street Lighting

The invention provides a soft switching conversion device based on a flyback converter On the basis of the conventional Flyback converter power topology, a clamp branch consisting of a controllable power clamper tube and a clamp capacitor is connected to a drain end of a main power tube in series; a primary side chip of the conversion device receives information such as the peak excitation current, the valley bottom excitation current and the maximum voltage of switching nodes of a converter power loop and generates ideal drive dead time varying with an input voltage and a load condition to control the main power tube and the clamper tube, so that the voltage oscillation of the drain end of the power tube caused by leakage inductance can be completely eliminated Owing to the basically loss-free soft switching technology of the MOS tube active clamp, the stable clamp voltage value and the primary-side and auxiliary-side full working conditions, the device can work at a high frequency(> 1MHz) and can greatly increase the power density of a power adapter when being applied to the adapter

A soft switching conversion device based on a flyback converter

The active clamp flyback (ACF) converter utilising gallium nitride (GaN) devices with high-switching frequency and high efficiency is impressive in system miniaturisation for AC–DC adapters. Owing to poor reverse conduction of GaN devices, the improper dead time between two switches can cause large power consumption in high frequency. This study proposes a dynamic dead time optimisation technique for GaNs ideal zero-voltage switching (ZVS) to address the issue. It adjusts the clamp switch on time to avoid large reverse conduction voltage stress on the main switch in different loads conditions. In addition, a new control scheme for clamp switch is introduced for enhancing efficiency in light to medium load. These techniques are experimentally verified on a 45 W (20 V/2.25 A) prototype of an ACF converter with a field-programmable gate array. The controller enables the system to operate at 1 MHz and dynamically modulates the dead-time under universal input and full load. With the light load ZVS control scheme, the system can achieve a maximum efficiency of 94.12 and 80.23% in the worst case. The prototyped converter can achieve power density (exclude case and controller) of 18 W/in
 3
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https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-pel.2020.0464

Digitally controlled GaN-based MHz active clamp flyback converter with dynamic dead time optimisation for AC–DC adapter

This paper presents a 14-bit column-parallel successive approximation analog-to-digital converter (SA ADC) for CMOS image sensor. The proposed SA ADC utilizes a 7-bit charge redistribution capacitor digital-to-analog converter (CDAC) with four column shared reference voltages to significantly reduce the area and power consumption. An on-chip self-calibration scheme is employed to calibrate the two scaled reference voltages. The calibration technique is free from comparator offset and convenient to implement. Simulation shows that the error of the scaled reference voltages after calibration is less than 0.21 LSB. The proposed SA ADC is implemented in 0.18-μm CMOS technology and achieves a DNL of +0.33/-0.33 LSB and INL of +0.39/-0.33 LSB while consumes 191 μW at a sampling rate of 600 KS/s.

A 14-bit column-parallel two-step SA ADC with on-chip scaled reference voltages self-calibration for CMOS image sensor

The invention discloses a control chip for realizing low-standby power consumption of an AC-DC switch power supply. The control chip includes an output voltage detecting unit, a constant voltage frequency control unit, a standby determination module, a secondary conduction time detecting unit, a constant current frequency control unit, a constant voltage/constant current mode selection unit, a leading edge blanking unit, a peak value current comparison unit, an RS trigger, a driving unit, and a built-in power supply unit. From the aspect of the circuit structure of the switch power supply control chip, the internal circuit structure of the chip can be adjusted under the system standby state, standby signals of the system are generated by the standby determination module and part of unnecessary circuit modules are turned off when the normal standby of the system is maintained, and the work current for chip standby is reduced. Meanwhile, the inner power supply voltage of the chip is reduced under the system standby state, and the standby power consumption of the control chip can be further reduced under the condition that the dynamic performance is not influenced.

Control chip for realizing low-standby power consumption of AC-DC switch power supply

The invention discloses a peak current control unit based on peak current mode control, and the unit is applied to Buck, Boost and Flyback transformers and the like. The unit receives a differential voltage signal output by a detection network in a current branch to be detected as well as a feedback signal and a reference voltage signal output by a system; the system outputs the feedback signal and the reference voltage signal to generate two paths of differential currents via operation amplification clamping, and the detection network outputs the differential voltage signal to generate another two paths of differential currents; a differential current obtained by subtracting one pair of differential currents from the other pair of differential currents is sent an open-loop trans-impedance amplifier, and processed by the amplifier to generate a differential voltage signal; and the differential voltage is input to a comparator, a power driving circuit connected to output of the comparator disconnects a corresponding power switch tube, and the peak current of the transformer is controlled. Compared with the prior art, the speed and precision of peak current control are improved greatly, and power consumption of the control circuit is reduced.

Lenian He

Papers

A soft switching conversion device based on a flyback converter

Digitally controlled GaN-based MHz active clamp flyback converter with dynamic dead time optimisation for AC–DC adapter

A 14-bit column-parallel two-step SA ADC with on-chip scaled reference voltages self-calibration for CMOS image sensor

Control chip for realizing low-standby power consumption of AC-DC switch power supply

Peak current control unit based on peak current mode control