A floating-point ADC (FP-ADC) has been proposed for the purpose of achieving a wide dynamic range without demanding a high resolution, when the high resolution is merely for covering the signal dynamic range rather than the quantization accuracy. In an FP-ADC, the dynamic range and resolution can be designed independently. Unlike the known logarithmic amplifier solution, it directly gives a linear digital output. It can work with a small input range imposed by a low voltage supply as its virtual input range is greatly expanded. The principle, key circuitry, achievable performance and sensitivities to mismatches are addressed in this paper. Simulation results indicate that this approach is capable of achieving up to a 16 bit dynamic range with an 8-10 bit effective resolution at a sampling rate of 40 MS/s in submicron CMOS.

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Floating-point analog-to-digital converter

We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed A/D converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design. (Less)

FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

We discuss the application of Modular Neural Networks (MNNs) for high-performance, high rate classification of HEP events, both in terms of the algorithms involved, and their hardware implementation Three different problems were treated successfully with the MNN framework, namely the identification of electrons and photons in the first and second trigger levels of the CMS experiment and the classification of Cherenkov rings in a RICH detector, showing the versatility and conceptual simplicity of MNN for triggering in HEP experiments A prototype of the electron/photon trigger primitives generation system for the CMS experiment, based on a MNN and implemented with L-Neuro 23 chips, was developed and tested in the CERN SPS H4 beam line The system reached excellent performance, identifying electrons with full efficiency at the 40 MHz LHC clock The same hardware, properly reprogrammed, is able to handle the trigger of strangelet rings in the context of an experiment to search for exotic matter

Modular neural networks for on-line event classification in high energy physics

We describe the digital filter section of the FERMI readout microsystem. The filter section, consisting of two separate filter blocks, extracts the pulse amplitude and time information for the first-level trigger process and performs a highly accurate energy measurement for higher-level triggering and data readout purposes. An FIR-order statistic hybrid filter structure is used to improve the amplitude extraction performance. Using a training procedure the filters are optimized to produce a precise and accurate output in the presence of electronics and pile-up noise, sample timing jitter and the superposition of high-energy pulses. As the FERMI system resides inside the detector where accessibility is limited, the filter implementations are presented together with fault tolerance considerations. The filter section is modelled with the VHDL hardware descriptive language and the subsystems are further optimized to minimize the system latency and circuit area.

Optimized digital feature extraction in the FERMI microsystem

Prototypes of the FERMI system have been used to read out a prototype of the ATLAS hadron calorimeter in a beam test at the CERN SPS. The FERMI read-out system, using a compressor and a sampling ADC, is compared to a standard charge integrating read-out by measuring the energy resolution of the calorimeter separately with the two systems on the same events. Signal processing techniques have been designed to optimize the treatment of FERMI data. The resulting energy resolution is better than the one obtained with the standard read-out.

/pdf/evaluation-of-fermi-read-out-of-the-atlas-tilecal-prototype-2heqicu5xj.pdf

M. Givoletti

Papers

FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

Optimized digital feature extraction in the FERMI microsystem