In this paper, a fast transient testing methodology for predicting the performance parameters of analog circuits is presented. A transient test signal is applied to the circuit under (cut) test and the transient response of the circuit is sampled and analyzed to predict the circuit's performance parameters. An algorithm for generating the optimum transient test signal is presented. The methodology is demonstrated in a production environment using a low-power opamp. Result from production test data showed: 1) a ten times speedup in production testing; 2) accurate prediction of the performance parameters; and 3) a simpler test configuration.

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Prediction of analog performance parameters using fast transient testing

The use of alternate tests in addition to specification-based measurements is achieving more recognition in industry due to the higher coverage that they provide. The fault and yield coverages of these tests depend on how the pass/fail test decision is made. In this paper we address the critical issue of accurate test threshold determination for these alternate tests. We propose to post-process the given set of sensitive and linearly independent measurements to synthesize a new set of measurements based on which the pass/fail decision is made. A novel methodology for post processing the measurement results called measurement synthesis is presented. Simulation results show that test effectiveness can be greatly enhanced by measurement synthesis.

Enhancing test effectiveness for analog circuits using synthesized measurements

Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technologies require designs with built-in logic soft error protection. Effective logic soft error protection requires solutions to the following three problems: (1) accurate soft error rate estimation for combinational logic networks; (2) automated estimation of system effects of logic soft errors, and identification of regions in a design that must be protected; and, (3) new cost-effective techniques for logic soft error protection, because classical fault-tolerance techniques are very expensive.

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Logic soft errors in sub-65nm technologies design and CAD challenges

Testability analysis of analog circuits in the presence of soft, large-deviation, and hard faults greatly facilitates production of testable systems. The authors analyze these faults by observing their symptoms at the circuit's output, an approach that uses the same test methodology to analyze all three fault types. Their algorithm indicates the set of adequate test frequencies and nodes that increase fault observability. They conclude by generating test vectors for observing and covering these faults. >

Multifrequency analysis of faults in analog circuits

Analog circuit testing is considered to be a very difficult task, due mainly to the lack of fault models and accessibility to internal nodes. An approach is presented for analog circuit modeling and testing to overcome this problem. This circuit modeling is based on a sensitivity computation and on circuit structure, which are crucial in analog circuit testing. The testability of the circuit is achieved for the simple fault model and by functional testing. Component deviations are deduced by measuring a number of output parameters, and through sensitivity analysis and tolerance computation. Using this approach, adequate tests are identified for testing both catastrophic and soft faults. Some experimental results are presented. >

Analog circuit testing based on sensitivity computation and new circuit modeling

An approach based on functional testing and on sensitivity calculation of many output parameters for diagnosis of defective elements in analog circuits is presented. A sensitivity matrix that gives the relation between the deviation of output parameters and the deviation of defective components in a circuit forms the basis of the test equations. Diverse types of measurement help improve the diagnostic resolution. Experimental results are presented to clarify the algorithm and prove its efficiency in a practical case. >

M. Slamani

Papers

Analog circuit fault diagnosis based on sensitivity computation and functional testing

Multifrequency analysis of faults in analog circuits