The impact of statistical dopant fluctuations on the threshold voltage V/sub T/ and device performance of silicon MOSFET's is investigated by means of analytical and numerical modeling. A new analytical model describing dopant fluctuations in the active device area enables the derivation of the standard deviation, /spl sigma/V/sub T/, of the threshold voltage distribution for arbitrary channel doping profiles. Using the MINIMOS device simulator to extend the analytical approach, it is found that /spl sigma/V/sub T/, can be properly derived from two-dimensional (2-D) or three-dimensional (3-D) simulations using a relatively coarse simulation grid. Evaluating the threshold voltage shift arising from dopant fluctuations, on the other hand, calls for full 3-D simulations with a numerical grid that is sufficiently refined to represent the discrete nature of the dopant distribution. The average V/sub T/-shift is found to be positive for long, narrow devices, and negative for short, wide devices. The fast 2-D MINIMOS modeling of dopant fluctuations enables an extensive statistical analysis of the intrinsic spreading in a large set of compact model parameters for state-of-the-art CMOS technology. It is predicted that V/sub T/-variations due to dopant fluctuations become unacceptably large in CMOS generations of 0.18 /spl mu/m and beyond when the present scaling scenarios are pursued. Parameter variations can be drastically reduced by using alternative device designs with ground-plane channel profiles.

Modeling statistical dopant fluctuations in MOS transistors

The properties of the dielectric strongly influence the performance of organic thin-film transistors. In this letter, we show experimental results that quantify the influence of the roughness of the dielectric on the mobility of pentacene transistors and discuss the cause of it. We consider the movement of charge carriers out of the “roughness valleys” or across those valleys at the dielectric–semiconductor interface as the limiting step for the roughness-dependent mobility in the transistor channel.

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Influence of the dielectric roughness on the performance of pentacene transistors

Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET

A new, comprehensive, physically-based, semiempirical, local model for transverse-field dependent electron and hole mobility in MOS transistors is presented. In order to accurately predict the measured relationship between the effective mobility and effective electric field over a wide range of substrate doping and bias, we account for the dependence of surface roughness limited mobility on the inversion charge density, in addition to including the effect of coulomb screening of impurities by charge carriers in the bulk mobility term. The result is a single mobility model applicable throughout a generalized device structure that gives good agreement with measured mobility data and measured MOS I-V characteristics over a wide range of substrate doping, channel length, transverse electric field, substrate bias, and temperature.

An improved electron and hole mobility model for general purpose device simulation

A comprehensive physical model for the analysis, characterization, and design of 4H-silicon carbide (SiC) MOSFETs has been developed. The model has been verified for an extensive range of bias conditions and temperatures. It incorporates details of interface trap densities, Coulombic interface trap scattering, surface roughness scattering, phonon scattering, velocity saturation, and their dependences on bias and temperature. The physics-based models were implemented into our device simulator that is tailored for 4H-SiC MOSFET analysis. By using a methodology of numerical modeling, simulation, and close correlation with experimental data, values for various physical parameters governing the operation of 4H-SiC MOSFETs, including the temperature-dependent interface trap density of states, the root-mean-square height and correlation length of the surface roughness, and the electron saturation velocity in the channel and its dependence on temperature, have been extracted. Coulomb scattering and surface roughness scattering limit surface mobility for a wide range of temperatures in the subthreshold and linear regions of device operation, whereas the saturation velocity and the high-field mobility limit current in the saturation region.

A Physical Model of High Temperature 4H-SiC MOSFETs

A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >

M. Vanzi

Papers

A physically based mobility model for numerical simulation of nonplanar devices