Showing papers by "Mani Soma published in 1990"
13 May 1990
TL;DR: An approach to the crosstalk analysis of high-speed interconnects has been developed that yields closed-form expressions of the voltage and current transfer functions and time-domain signal waveforms that facilitate analytical evaluation of coupling noise, waveform distortion, and propagation delay due to crosStalk inherent in multiconductor interConnects.
Abstract: An approach to the crosstalk analysis of high-speed interconnects has been developed. The method yields closed-form expressions of the voltage and current transfer functions and time-domain signal waveforms. The results facilitate analytical evaluation of coupling noise, waveform distortion, and propagation delay due to crosstalk inherent in multiconductor interconnects. The method is applicable to the general problem of N coupled lossy and/or dispersive interconnects with arbitrary linear source/load impedances. >
15 citations
TL;DR: The design of built-in test systems for large arrays is approached from the viewpoint of detecting real faults in the mask layers of a typical CMOS process and provides a practical compromise between the costly hardware augmentation plaguing existing techniques and circuit independence of the test procedure.
Abstract: The design of built-in test systems for large arrays is approached from the viewpoint of detecting real faults in the mask layers of a typical CMOS process. The resulting testable design and built-in test system provides a practical compromise between the costly hardware augmentation plaguing existing techniques and circuit independence of the test procedure. Built-in testability is achieved independently of feedback. Therefore, combinational and sequential circuits can be tested in parallel with exactly the same hardware and method. The test-specific hardware overhead decreases rapidly with increasing circuit size and falls below 10% for large arrays with more than 100 product terms. No additional gate delays are introduced into the critical path by the test circuitry. The normal circuit performance is, therefore, left intact with the exception of a minimal degradation associated with adding tristate capability to the input buffers. >
5 citations
TL;DR: The emphasis is on a new capacitor attachment and a new double-substrate design that have been successfully applied to the packaging of an implantable auditory prosthesis that will be implanted for in vivo studies.
Abstract: Several substrate and package design techniques for minimizing the overall size of bioelectronic systems, especially those that will be implanted for in vivo studies, are presented. The emphasis is on a new capacitor attachment and a new double-substrate design that have been successfully applied to the packaging of an implantable auditory prosthesis. The entire procedure for this case is described and compared with standard techniques to illustrate the advantages of this new approach in packaging. >
4 citations
01 Sep 1990
TL;DR: The proposed mixed array architecture is shown to possess strong potential in other high-performance computing applications and to implement several signal processing algorithms used in coordinate rotation for image processing.
Abstract: This paper presents the design of a mixed digital/analog array to implement several signal processing algorithms used in coordinate rotation for image processing. The advantages of hybrid arrays in which the processor element can be either analog or digital depending on a specific computing requirement are discussed. The interfaces between processor elements of different types are considered and several circuits are designed for this task. The proposed mixed array architecture is shown to possess strong potential in other high-performance computing applications.© (1990) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
1 citations