In recent years, indoor positioning has emerged as a critical function in many end-user applications; including military, civilian, disaster relief and peacekeeping missions. In comparison with outdoor environments, sensing location information in indoor environments requires a higher precision and is a more challenging task in part because various objects reflect and disperse signals. Ultra WideBand (UWB) is an emerging technology in the field of indoor positioning that has shown better performance compared to others. In order to set the stage for this work, we provide a survey of the state-of-the-art technologies in indoor positioning, followed by a detailed comparative analysis of UWB positioning technologies. We also provide an analysis of strengths, weaknesses, opportunities, and threats (SWOT) to analyze the present state of UWB positioning technologies. While SWOT is not a quantitative approach, it helps in assessing the real status and in revealing the potential of UWB positioning to effectively address the indoor positioning problem. Unlike previous studies, this paper presents new taxonomies, reviews some major recent advances, and argues for further exploration by the research community of this challenging problem space.

https://www.mdpi.com/1424-8220/16/5/707/pdf

Ultra Wideband Indoor Positioning Technologies: Analysis and Recent Advances.

A simple, physically based analysis illustrate the noise processes in CMOS inverter-based and differential ring oscillators. A time-domain jitter calculation method is used to analyze the effects of white noise, while random VCO modulation most straightforwardly accounts for flicker (1/f) noise. Analysis shows that in differential ring oscillators, white noise in the differential pairs dominates the jitter and phase noise, whereas the phase noise due to flicker noise arises mainly from the tail current control circuit. This is validated by simulation and measurement. Straightforward expressions for period jitter and phase noise enable manual design of a ring oscillator to specifications, and guide the choice between ring and LC oscillator

http://venividiwiki.ee.virginia.edu/mediawiki/images/c/c2/A_abidi.pdf

Phase Noise and Jitter in CMOS Ring Oscillators

A system, method, and computer program product are provided for a touch or pressure signal-based interface. In operation, a touch or pressure signal is received in association with a touch interface of a device. To this end, a user experience is altered utilizing the signal. A system, method, and computer program product are provided for modifying one or more objects in one or more memory devices. In one embodiment, an apparatus is provided, comprising one or more memory devices including a non-volatile memory. Additionally, the apparatus comprises circuitry including a first communication path for communicating with the at least one processor, and a second communication path for communicating with at least one storage sub-system which operates slower than the one or more memory devices. Further, the circuitry is operable to modify one or more objects in the one or more memory devices.

User interface system, method, and computer program product

A new small-signal modeling approach applied to GaN-based devices is presented. In this approach, a new method for extracting the parasitic elements of the GaN device is developed. This method is based on two steps, which are: 1) using cold S-parameter measurements, high-quality starting values for the extrinsic parameters that would place the extraction close to the global minimum of the objective function for the distributed equivalent circuit model are generated and 2) the optimal model parameter values are searched through optimization using the starting values already obtained. The bias-dependent intrinsic parameter extraction procedure is improved for optimal extraction. The validity of the developed modeling approach and the proposed small-signal model is verified by comparing the simulated wide-band small-signal S-parameter, over a wide bias range, with measured data of a 0.5-/spl mu/m GaN high electron-mobility transistor with a 2/spl times/50 /spl mu/m gatewidth.

A new small-signal modeling approach applied to GaN devices

We present a rigorous approach for designing a highly efficient coupling between single mode optical fibers and silicon nanophotonic waveguides based on diffractive gratings. The structures are fabricated on standard SOI wafers in a cost-effective CMOS process flow. The measured coupling efficiency reaches −1.08 dB and a record value of −0.62 dB in the 1550 nm telecommunication window using a uniform and a nonuniform grating, respectively, with a 1dB-bandwidth larger than 40 nm.

Bridging the gap between optical fibers and silicon photonic integrated circuits.

A 100 MHz to 3.5 GHz four-stage CMOS ring oscillator with quadrature outputs and oscillator core current consumption roughly proportional to operating frequency is presented. A novel oscillator topology consisting of a chain of four static single-ended CMOS inverters, four additional feedforward inverters and frequency control by steering the total oscillator core current is proposed. The circuit is implemented in a 0.18/spl mu/ standard CMOS technology. Oscillator core current consumption is 90/spl mu/A at 100 MHz and 9mA at 3.5 GHz with a 1.8V supply. Measured phase noise at 4 MHz offset is -114dBc/Hz at 100MHz and -106dBc/Hz at 3.5GHz oscillation frequency. Quadrature error is better than 3.5/spl deg/ over the 100 MHz to 3GHz frequency range.

CMOS ring oscillator with quadrature outputs and 100 MHz to 3.5 GHz tuning range

The small-signal equivalent circuit of AlGaN/GaN HEMT is discussed It is shown that an extremely high gate voltage has to be applied to correctly determine series resistances. Effects appearing at high forward gate voltages are discussed. Good agreement between measured and simulated data has been achieved.

Determination of small-signal parameters of GaN-based HEMTs

An 8-bit 100-GS/s digital-to-analog converter (DAC) using a distributed output topology in 28-nm low-power CMOS for optical communications is presented. The DAC can convert 1-k symbols stored in the 1-kbyte design-for-test on-chip memory cyclically. By interleaving four 25-GS/s return-to-zero DACs, the highest signal frequency of the 100-GS/s DAC is about 25 GHz and the output image is located beyond 75 GHz. The 3-dB bandwidth exceeds 13 GHz at 100 GS/s. The effective number of bits and spurious-free dynamic range ranges from 5.3 bit and 41 dB to 3.2 bit and 27 dB from dc up to 24.9 GHz at 100 GS/s, respectively. Transmission rates of 120 and 45 Gb/s are obtained in an electrical and an optical back-to-back experiment, respectively. The DAC test chip consumes 2.5 W from a power supply with multiple outputs of 1.1, 1.5, and 2 V.

An 8-bit 100-GS/s Distributed DAC in 28-nm CMOS for Optical Communications

The present CMOS technology provides n-channel MOSFETs with a transit frequency beyond 30 GHz, which are attractive for RF integrated circuits, e.g., low-noise amplifiers. This paper presents an improved deembedding procedure for extraction of parasitic elements of MOSFETs. The extraction determines the intrinsic elements of the small-signal equivalent circuit. As a result, a new method to determine the gate capacitance is presented. This deembedding procedure is based on an analytical solution of the equations and facilitates the determination of the elements at any specific frequency. Moreover, a temperature noise model is presented, which is based on the small-signal equivalent circuit with an analytical description of the channel noise. This enables a complete noise modeling of all four noise parameters and the determination of the dominant noise sources. Finally, the noise-figure measurements are compared with the simulation results.

Small-signal and temperature noise model for MOSFETs

A monolithically integrated optical receiver fabricated in an unmodified 0.18-/spl mu/m silicon complementary metal-oxide-semiconductor technology is presented. The receiver features a spatially modulated photodetector to suppress slow diffusion tails. The receiver circuit comprises a transimpedance amplifier, a limiting amplifier, and an output buffer. At 2 Gb/s and an incident wavelength of 850 nm, a receiver sensitivity of -8 dBm at a bit-error rate of 10/sup -9/ has been achieved.

Markus Grozing

Papers

CMOS ring oscillator with quadrature outputs and 100 MHz to 3.5 GHz tuning range

Determination of small-signal parameters of GaN-based HEMTs

An 8-bit 100-GS/s Distributed DAC in 28-nm CMOS for Optical Communications

Small-signal and temperature noise model for MOSFETs

2-gb/s CMOS optical integrated receiver with a spatially Modulated photodetector