Carbon trading volume and price forecasting in China using multiple machine learning models

Vehicle-to-Grid (V2G) is a promising technology that allows the batteries of idle or parked electric vehicles (EVs) to operate as distributed resources, which can store or release energy at appropriate times, resulting in a bidirectional exchange of power between the ac grid and the dc EV batteries. This bidirectional exchange of power is realized using bidirectional power electronic converters that connect the grid with the EV battery. Most research on bidirectional converters for V2G applications focuses on using two dedicated power conversion stages – a bidirectional ac-dc conversion stage that helps in power factor correction, followed by a bidirectional dc-dc conversion stage that provides voltage matching. However, a single bidirectional ac-dc conversion stage can also facilitate V2G and grid-to vehicle (G2V) active power transfers. This paper reviews and compares the various bidirectional ac-dc and dc-dc converter topologies that facilitate V2G and G2V active power flows. Moreover, the paper discusses the various classes of charger/discharger systems reported for V2G applications, like on-board/off-board, integrated/non-integrated and conductive/inductive, and a comparative statement is made based on certain proposed criteria. Further, the current trends in the application of wide band-gap devices in high power-dense V2G capable converters and integration of renewable energy sources into EV charging/discharging infrastructures have also been discussed.

Review of power electronics in vehicle-to-grid systems

Biomedical applications often require classifiers that are both accurate and cheap to implement. Today, deep neural networks achieve the state-of-the-art accuracy in most learning tasks that involve large data sets of unstructured data. However, the application of deep learning techniques may not be beneficial in problems with limited training sets and computational resources, or under domain-specific test time constraints. Among other algorithms, ensembles of decision trees, particularly the gradient boosted models have recently been very successful in machine learning competitions. Here, we propose an efficient hardware architecture to implement gradient boosted trees in applications under stringent power, area, and delay constraints, such as medical devices. Specifically, we introduce the concepts of asynchronous tree operation and sequential feature extraction to achieve an unprecedented energy and area efficiency. The proposed architecture is evaluated in automated seizure detection for epilepsy, using 3074 h of intracranial EEG data from 26 patients with 393 seizures. Average F1 scores of 99.23% and 87.86% are achieved for random and block-wise splitting of data into train/test sets, respectively, with an average detection latency of 1.1 s. The proposed classifier is fabricated in a 65-nm TSMC process, consuming 41.2 nJ/class in a total area of $540\times 1850\,\,\mathrm {\mu m}^{2}$ . This design improves the state-of-the-art by $27\times $ reduction in energy-area-latency product. Moreover, the proposed gradient-boosting architecture offers the flexibility to accommodate variable tree counts specific to each patient, to trade the predictive accuracy with energy. This patient-specific and energy-quality scalable classifier holds great promise for low-power sensor data classification in biomedical applications.

Energy-Efficient Classification for Resource-Constrained Biomedical Applications

Recent review papers have investigated seizure prediction, creating the possibility of preempting epileptic seizures. Correct seizure prediction can significantly improve the standard of living for the majority of epileptic patients, as the unpredictability of seizures is a major concern for them. Today, the development of algorithms, particularly in the field of machine learning, enables reliable and accurate seizure prediction using desktop computers. However, despite extensive research effort being devoted to developing seizure detection integrated circuits (ICs), dedicated seizure prediction ICs have not been developed yet. We believe that interdisciplinary study of system architecture, analog and digital ICs, and machine learning algorithms can promote the translation of scientific theory to a more realistic intelligent, integrated, and low-power system that can truly improve the standard of living for epileptic patients. This review explores topics ranging from signal acquisition analog circuits to classification algorithms and dedicated digital signal processing circuits for detection and prediction purposes, to provide a comprehensive and useful guideline for the construction, implementation and optimization of wearable and integrated smart seizure prediction systems.

From Seizure Detection to Smart and Fully Embedded Seizure Prediction Engine: A Review

Epilepsy is a common nervous system disease that is characterized by recurrent seizures. An electroencephalogram (EEG) records neural activity, and it is commonly used for the diagnosis of epilepsy. To achieve accurate detection of epileptic seizures, an automatic detection approach of epileptic seizures, integrating complementary ensemble empirical mode decomposition (CEEMD) and extreme gradient boosting (XGBoost), named CEEMD-XGBoost, is proposed. Firstly, the decomposition method, CEEMD, which is capable of effectively reducing the influence of mode mixing and end effects, was utilized to divide raw EEG signals into a set of intrinsic mode functions (IMFs) and residues. Secondly, the multi-domain features were extracted from raw signals and the decomposed components, and they were further selected according to the importance scores of the extracted features. Finally, XGBoost was applied to develop the epileptic seizure detection model. Experiments were conducted on two benchmark epilepsy EEG datasets, named the Bonn dataset and the CHB-MIT (Children's Hospital Boston and Massachusetts Institute of Technology) dataset, to evaluate the performance of our proposed CEEMD-XGBoost. The extensive experimental results indicated that, compared with some previous EEG classification models, CEEMD-XGBoost can significantly enhance the detection performance of epileptic seizures in terms of sensitivity, specificity, and accuracy.

https://www.mdpi.com/1099-4300/22/2/140/pdf

Detecting Epileptic Seizures in EEG Signals with Complementary Ensemble Empirical Mode Decomposition and Extreme Gradient Boosting

A fast and low-power embedded classifier with small footprint is essential for real-time applications such as brain-machine interfaces (BMIs) and closed-loop neuromodulation for neurological disorders. In most applications with large datasets of unstructured data, such as images, deep neural networks (DNNs) achieve a remarkable classification accuracy. However, DNN models impose a high computational cost during inference, and are not necessarily ideal for problems with limited training sets. The computationally intensive nature of deep models may also degrade the classification latency, that is critical for real-time closed-loop applications. Among other methods, ensembles of decision trees (DTs) have recently been very successful in neural data classification tasks. DTs can be designed to successively process a limited number of features during inference, and thus impose much lower computational and memory overhead. Here, we compare the hardware complexity of DNNs and gradient boosted DTs for classification of real-time electrophysiological data in epilepsy. Our analysis shows that the strict energy-area-latency trade-off can be relaxed using an ensemble of DTs, and they can be significantly more efficient than alternative DNN models, while achieving better classification accuracy in real-time neural data classification tasks.

Hardware Complexity Analysis of Deep Neural Networks and Decision Tree Ensembles for Real-time Neural Data Classification

Cost-efficient machine learning is essential for on-chip processing of data in resource-limited applications such as brain implants, wearable sensors, and IoT devices. In this paper, we propose a hardware-friendly machine learning model based on gradient boosted decision trees for neurological disease detection. Our model combines fixed point quantization and cost-efficient inference to enable low-power embedded learning. Testing this model on the intracranial EEG data from 14 epilepsy patients, we can reduce the feature extraction cost by 53.1% and quantize the leaf weights with 4 bits, while maintaining the seizure detection performance. In a second experiment on Parkinsonian tremor detection from local field potentials of 12 patients, we achieve a 55.4% cost reduction and 12-bit leaf quantization. The proposed model offers a hardware-friendly solution for on-chip and real-time detection of neurological disorders.

Cost-Efficient Classification for Neurological Disease Detection

Battery and plug-in hybrid vehicles equipped with bidirectional battery chargers are capable of supplying power to the electric grid according to power system demand. This technology is called “vehicle to grid” or V2G. A bidirectional on-board charger can be used to improve the charge availability. An on-board charger should have small size and light weight. On the other hand, the charger must minimize power quality impact, draw current at high power factor to maximize power from an outlet. In this paper, a new three-phase integrated bidirectional isolated soft-switched battery charger is proposed which is appropriate for vehicle to grid technology. The charger utilizes a 4-switch 3Φ-rectifier as the front-end AC/DC converter and a phase-shift controlled dual bridge series resonant as the rear-end DC/DC converter. The performance of the proposed charger is investigated by simulation results.

Integrated bidirectional isolated soft-switched battery charger for vehicle-to-grid technology using 4-Switch 3Φ-rectifier

A 41.2 nJ/class, 32-channel, patient-specific onchip classification architecture for epileptic seizure detection is presented. The proposed system-on-chip (SoC) breaks the strict energy-area-delay trade-off by employing area and memoryefficient techniques. An ensemble of eight gradient-boosted decision trees, each with a fully programmable Feature Extraction Engine (FEE) and FIR filters are continuously processing the input channels. In a closed-loop architecture, the FEE reuses a single filter structure to execute the top-down flow of the decision tree. FIR filter coefficients are multiplexed from a shared memory. The 540 × 1850 μm2 prototype with a 1kB register-type memory is fabricated in a TSMC 65nm CMOS process. The proposed on-chip classifier is verified on 2253 hours of intracranial EEG (iEEG) data from 20 patients including 361 seizures, and achieves specificity of 88.1% and sensitivity of 83.7%. Compared to the state-of-the-art, the proposed classifier achieves 27 × improvement in Energy-AreaLatency product.

Milad Taghavi

Papers

Energy-Efficient Classification for Resource-Constrained Biomedical Applications

Hardware Complexity Analysis of Deep Neural Networks and Decision Tree Ensembles for Real-time Neural Data Classification

Cost-Efficient Classification for Neurological Disease Detection

Integrated bidirectional isolated soft-switched battery charger for vehicle-to-grid technology using 4-Switch 3Φ-rectifier

A 41.2 nJ/class, 32-Channel On-Chip Classifier for Epileptic Seizure Detection