M
Motohisa Hirao
Researcher at Hitachi
Publications - 23
Citations - 298
Motohisa Hirao is an academic researcher from Hitachi. The author has contributed to research in topics: Laser & Diode. The author has an hindex of 11, co-authored 23 publications receiving 298 citations.
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Patent
Optical device diffraction gratings and a photomask for use in the same
Makoto Okai,Shinji Tsuji,Akio Ohishi,Motohisa Hirao,Hiroyoshi Matsumura,Tatsuo Harada,Toshiaki Kita,Taira Hideki +7 more
TL;DR: In this paper, a method of fabricating diffraction gratings where a photomask is arranged on a substrate which is coated with a photoresist, light is to be incident thereupon at an acute angle relative to the normal direction of the photOMask, and a bright/dark pattern is formed on said photoresists by the interference of the transmission light that has passed through the photomasks and the diffraction light.
Patent
Distributed-feedback semiconductor laser device
TL;DR: Disclosed as mentioned in this paper is a distributed feedback semiconductor laser provided with a grating which effects optical feedback by means of periodic corrugation disposed inside an optical resonator, which can realize stable single longitudinal mode oscillation.
Journal ArticleDOI
Monolithic integration of laser diodes, photomonitors, and laser driving and monitoring circuits on a semi-insulating GaAs
TL;DR: A monolithic optoelectronic integrated circuit (OEIC) incorporating laser diodes, photomonitors, and laser driving and monitoring circuits has been fabricated on a semi-insulating GaAs substrate as discussed by the authors.
Journal ArticleDOI
Accelerated Aging Characteristics of InGaAsP/InP Buried Heterostructure Lasers Emitting at 1.3 µm
TL;DR: In this article, a 1.3 µm InGaAsP InP buried heterostructure laser with optimized stripe widths of 1.5 µm was used for high temperature operation up to 95°C.
Patent
Semiconductor light emitting element
TL;DR: A semiconductor laser light emitting element comprises a semiconductor substrate, a laminate region of semiconductor layers having at least a first, a second and a third semiconductor layer formed over the substrate and having a p-n junction defined therein this paper.