Artificial neural networks (ANNs) constitute a class of flexible nonlinear models designed to mimic biological neural systems. In this entry, we introduce ANN using familiar econometric terminology and provide an overview of ANN modeling approach and its implementation methods. † Correspondence: Chung-Ming Kuan, Institute of Economics, Academia Sinica, 128 Academia Road, Sec. 2, Taipei 115, Taiwan; ckuan@econ.sinica.edu.tw. †† I would like to express my sincere gratitude to the editor, Professor Steven Durlauf, for his patience and constructive comments on early drafts of this entry. I also thank Shih-Hsun Hsu and Yu-Lieh Huang for very helpful suggestions. The remaining errors are all mine.

Artificial neural networks

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Design Of Analog Cmos Integrated Circuits

Everyday, people flexibly perform different categorizations of common faces, objects and scenes. Intuition and scattered evidence suggest that these categorizations require the use of different visual information from the input. However, there is no unifying method, based on the categorization performance of subjects, that can isolate the information used. To this end, we developed Bubbles, a general technique that can assign the credit of human categorization performance to specific visual information. To illustrate the technique, we applied Bubbles on three categorization tasks (gender, expressive or not and identity) on the same set of faces, with human and ideal observers to compare the features they used.

Bubbles: A Technique to Reveal the Use of Information in Recognition Tasks EOA Report

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

Analog hardware architecture of a memristor bridge synapse-based multilayer neural network and its learning scheme is proposed. The use of memristor bridge synapse in the proposed architecture solves one of the major problems, regarding nonvolatile weight storage in analog neural network implementations. To compensate for the spatial nonuniformity and nonideal response of the memristor bridge synapse, a modified chip-in-the-loop learning scheme suitable for the proposed neural network architecture is also proposed. In the proposed method, the initial learning is conducted in software, and the behavior of the software-trained network is learned by the hardware network by learning each of the single-layered neurons of the network independently. The forward calculation of the single-layered neuron learning is implemented on circuit hardware, and followed by a weight updating phase assisted by a host computer. Unlike conventional chip-in-the-loop learning, the need for the readout of synaptic weights for calculating weight updates in each epoch is eliminated by virtue of the memristor bridge synapse and the proposed learning scheme. The hardware architecture along with the successful implementation of proposed learning on a three-bit parity network, and on a car detection network is also presented.

Memristor Bridge Synapse-Based Neural Network and Its Learning

Face recognition: Past, present and future (a review)

Deaf people use sign languages to communicate with other people in the community. Although the sign language is known to hearing-impaired people due to its widespread use among them, it is not known much by other people. In this article, we have developed a real-time sign language recognition system for people who do not know sign language to communicate easily with hearing-impaired people. The sign language used in this paper is American sign language. In this study, the convolutional neural network was trained by using dataset collected in 2011 by Massey University, Institute of Information and Mathematical Sciences, and 100% test accuracy was obtained. After network training is completed, the network model and network weights are recorded for the real-time system. In the real-time system, the skin color is determined for a certain frame for hand use, and the hand gesture is determined using the convex hull algorithm, and the hand gesture is defined in real-time using the registered neural network model and network weights. The accuracy of the real-time system is 98.05%.

A Real-Time System for Recognition of American Sign Language by using Deep Learning

In this work, we focused on liveness detection for facial recognition system's spoofing via fake face movement. We have developed a pupil direction observing system for anti-spoofing in face recognition systems using a basic hardware equipment. Firstly, eye area is being extracted from real time camera by using Haar-Cascade Classifier with specially trained classifier for eye region detection. Feature points have extracted and traced for minimizing person's head movements and getting stable eye region by using Kanade-Lucas-Tomasi (KLT) algorithm. Eye area is being cropped from real time camera frame and rotated for a stable eye area. Pupils are extracted from eye area by using a new improved algorithm subsequently. After a few stable number of frames that has pupils, proposed spoofing algorithm selects a random direction and sends a signal to Arduino to activate that selected direction's LED on a square frame that has totally eight LEDs for each direction. After chosen LED has been activated, eye direction is observed whether pupil direction and LED's position matches. If the compliance requirement is satisfied, algorithm returns data that contains liveness information. Complete algorithm for liveness detection using pupil tracking is tested on volunteers and algorithm achieved high success ratio.

Anti-spoofing in face recognition with liveness detection using pupil tracking

In this brief, conic section function neural network (CSFNN) circuitry was designed for offline signature recognition. CSFNN is a unified framework for multilayer perceptron (MLP) and radial basis function (RBF) networks to make simultaneous use of advantages of both. The CSFNN circuitry architecture was developed using a mixed mode circuit implementation. The designed circuit system is problem independent. Hence, the general purpose neural network circuit system could be applied to various pattern recognition problems with different network sizes on condition with the maximum network size of 16-16-8. In this brief, CSFNN circuitry system has been applied to two different signature recognition problems. CSFNN circuitry was trained with chip-in-the-loop learning technique in order to compensate typical analog process variations. CSFNN hardware achieved highly comparable computational performances with CSFNN software for nonlinear signature recognition problems.

Conic Section Function Neural Network Circuitry for Offline Signature Recognition

This study introduces technology independent neural network modeling for fundamental blocks of analog integrated circuits. The circuits modeled here are basic current mirror structures and a differential amplifier which serves as the input stage to most op-amps. Here if a designer defines the output specifications of the circuit, the neural network gives the channel widths (W) of all transistors in the circuit. It must be noted that the neural network in this novel approach is trained with the database including simulations using 1.5 mum, 0.5 mum, 0.35 mum and 0.25 mum technology SPICE parameters and the test data is constituted with simulations using only 0.18 mum technology SPICE parameters which are not applied to the neural network for training beforehand. This shows that neural network is able to give the transistor sizes of circuit for a new unknown technology, independent on the SPICE parameters. As artificial neural network (ANN) structures, General Regression Neural Network (GRNN) and Multilayer Perceptron (MLP) having back propagation algorithm are used. Using new channel widths and lengths obtained from neural networkpsilas output, SPICE simulations of current mirrors and differential amplifier give the desired circuit output specifications for new technology.

Nihan Kahraman

Papers

Face recognition: Past, present and future (a review)

A Real-Time System for Recognition of American Sign Language by using Deep Learning

Anti-spoofing in face recognition with liveness detection using pupil tracking

Conic Section Function Neural Network Circuitry for Offline Signature Recognition

Technology independent circuit sizing for fundamental analog circuits using artificial neural networks