Nilanka Rajapaksha

TL;DR: The methods discussed in the paper can be used in the design of emerging low-power digital systems having lowest complexity at the cost of a loss in accuracy?the optimal trade-off of computational accuracy for lowest possible complexity and power.

TL;DR: A novel DCT approximation having zero multiplicative complexity is shown to be better for multi-beamforming AAs when compared to BAS-2008 and CB-2011, implying the fastest DCT approximations using reconfigured logic devices in the literature.

TL;DR: Close-form 2D wave-digital filter design equations and corresponding hardware architectures are proposed for realizing M independent fan-shaped passbands having independently steerable directionality and selectivity and are shown to be suitable for real-time sensor-array beamforming applications using custom VLSI circuits.

TL;DR: Three FRS architectures based on the Dempster-McLeod representation, expansion factor, and addition aware quantization are proposed, which are compared with competing algorithms in terms of arithmetic complexity.

TL;DR: An area efficient row-parallel architecture is proposed for the real-time implementation of bivariate algebraic integer (AI) encoded 2-D discrete cosine transform (DCT) for image and video processing.