Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

An ion beam deposition method is provided for manufacturing a coated substrate with improved abrasion resistance, and improved lifetime. The substrate is first chemically cleaned to remove contaminants. Secondly, the substrate is inserted into a vacuum chamber (1) on holder (3), and the air therein is evacuated via pump (2). Then the substrate surface is bombarded with energetic ions from ion beam source (4) supplied from inert (5) or reactive (6) gas inlets to assist in removing residual hydrocarbons and surface oxides, and activating the surface. After sputter-etching the surface, a protective, abrasion-resistant coating is deposited by ion beam deposition where reactive gas inlets (7, 8 and 9) may be employed. The ion beam-deposited coating may contain one or more layers. Once the chosen coating thickness is achieved, deposition is terminated, vacuum chamber pressure is increased to atmospheric pressure and the coated substrate products having improved abrasion-resistance are removed from the chamber. These coated products may be plastic sunglass lenses, ophthalmic lenses, bar codes scanner windows, and industrial wear parts needing protection from scratches and abrasion.

Ion beam process for deposition of highly abrasion-resistant coatings

A method of forming a metal nitride film using chemical vapor deposition (CVD), and a method of forming a metal contact and a semiconductor capacitor of a semiconductor device using the same, are provided. The method of forming a metal nitride film using chemical vapor deposition (CVD) in which a metal source and a nitrogen source are used as a precursor, includes the steps of inserting a semiconductor substrate into a deposition chamber, flowing the metal source into the deposition chamber, removing the metal source remaining in the deposition chamber by cutting off the inflow of the metal source and flowing a purge gas into the deposition chamber, cutting off the purge gas and flowing the nitrogen source into the deposition chamber to react with the metal source adsorbed on the semiconductor substrate, and removing the nitrogen source remaining in the deposition chamber by cutting off the inflow of the nitrogen source and flowing the purge gas into the deposition chamber. Accordingly, the metal nitride film having low resistivity and a low content of Cl even with excellent step coverage can be formed at a temperature of 500° C. or lower, and a semiconductor capacitor having excellent leakage current characteristics can be manufactured. Also, a deposition speed, approximately 20 A/cycle, is suitable for mass production.

Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact and capacitor of semiconductor device using the same

Carrier mobility in a heterojunction field effect device is increased by reducing or eliminating alloy scattering. The active channel region of the field effect device uses alternating layers of pure silicon and germanium which form a short period superlattice with the thickness of each layer in the superlattice being no greater than the critical thickness for maintaining a strained heterojunction. The gate contact of the field effect device can comprise quantum Si/Ge wires which provide quantum confinement in the growth plane, thereby allowing the field effect device to further improve the mobility by restricting phonon scattering. The structure can be used to improve device speed performance.

Field effect devices having short period superlattice structures using Si and Ge

A buried channel FET including a substrate, a relaxed SiGe layer, a channel layer, a SiGe cap layer, and an ion implanted dopant supply. The ion implanted dopant supply can be in either the SiGe cap layer or the relaxed SiGe layer. In one embodiment the FET is a MOSFET. In another embodiment the FET is within an integrated circuit. In yet another embodiment, the FET is interconnected to a surface channel FET.

Buried channel strained silicon FET using a supply layer created through ion implantation

A method and apparatus is described for combined deposition of thin films of materials from an ion beam source and a molecular beam source in a single reactor.

Combined ion and molecular beam apparatus and method for depositing materials

A process and resultant devices are described for forming MOSFET, CMOS and BICMOS devices of Group IV alloys, in particular SixGe1-x wherein 0<x<1, using ion beam oxidation (IBO) or ion beam nitridation (IBN) by CIMD to form insulators of the Group IV alloys.

Oxides and nitrides of metastabile groupe iv alloys and nitrides of group iv elements and semiconductor devices formed thereof

New dielectric materials based on SiGe have been formed at room temperature by direct ion beam oxidation and nitridation. Si0.8Ge0.2 layers were deposited by molecular beam epitaxy on Si(100) and then exposed to a low‐energy ion beam of 18O+2 to form oxides and 14N+2 to form nitrides. The ion energies investigated ranged from 100 eV to 1 keV. Thin films of SiGe oxide and SiGe nitride were formed at all energies used as evidenced by in situ x‐ray photoelectron spectroscopy analysis. They were found to be insulating by ex situ scanning electron microscopy observations. During the ion beam processing, the Ge content of the alloy layer decreases, due to preferential sputtering of Ge and the Ge compounds. However, as the ion energy is decreased, the concentration of Ge in the alloy remains closer to the original content. The thermal stability of these new SiGe dielectrics was also assessed up to 500 °C.

New SiGe dielectrics grown at room temperature by low-energy ion beam oxidation and nitridation

We are investigating the use of low energy ions (<1 keV) in low temperature thin film growth techniques, ion beam deposition (IBD) and combined ion and molecular deposition (CIMD). In IBD, a thin film is directly grown from a low energy ion beam as the only source of material, while in CIMD, low temperature growth of thin films is achieved by depositing materials simultaneously from a low energy ion beam and one or several molecular beams. A simple model of the IBD process has been developed and accounts for atomic collisions and thermal diffusion during thin film growth. Computer simulation of IBD of Si on Si have been conducted as a function of ion energy to support more quantitatively this physical description of IBD. The results show that the IBD growth mechanism is mediated by the fast diffusing interstitials and establish a low energy limit to achieve epitaxial growth by IBD that depends on the point defect diffusivities. The defect generation has to be confined in the subsurface region in order to ...

A quantitative model of point defect diffusivity and recombination in ion beam deposition and combined ion and molecular deposition

Ion beam oxidation (IBO) is a low temperature growth technique where a directional low energy (≤1 keV) ion beam introduces the oxygen into the substrate and athermally activates the chemical reaction leading to the oxide growth. In this work, IBO of Si, Ge, Si1−xGex was investigated experimentally as a function of ion energy from 100 eV to 1 keV. The results show a strong dependence of the materials properties such as phase formation, stoichiometry, and thickness upon the ion energy. To investigate the kinetics of IBO and to account for the observed relationship between ion energy and films properties, three models were successively developed taking progressively into account: (1) ion implantation and sputtering (model IS), (2) replacement and relocation events, i.e., ion beam mixing effects (model ISR) and (3) oxygen diffusion (model ISRD). The simulation results show that the model IS based only on implantation and sputtering cannot explain the oxide thickness dependence upon ion energy observed experim...

O. C. Hellman

Papers

Combined ion and molecular beam apparatus and method for depositing materials

Oxides and nitrides of metastabile groupe iv alloys and nitrides of group iv elements and semiconductor devices formed thereof

New SiGe dielectrics grown at room temperature by low-energy ion beam oxidation and nitridation

A quantitative model of point defect diffusivity and recombination in ion beam deposition and combined ion and molecular deposition

Role of ion energy in ion beam oxidation of semiconductors: Experimental study and model