Nanoscale technology nodes bring reliability concerns back to the center stage of digital system design. A systematic classification of approaches that increase system resilience in the presence of functional hardware (HW)-induced errors is presented, dealing with higher system abstractions, such as the (micro)architecture, the mapping, and platform software (SW). The field is surveyed in a systematic way based on nonoverlapping categories, which add insight into the ongoing work by exposing similarities and differences. HW and SW solutions are discussed in a similar fashion so that interrelationships become apparent. The presented categories are illustrated by representative literature examples to illustrate their properties. Moreover, it is demonstrated how hybrid schemes can be decomposed into their primitive components.

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Classification of Resilience Techniques Against Functional Errors at Higher Abstraction Layers of Digital Systems

According to conventional art, if there is an obstacle on the left of a vehicle, a control threshold value is set so as to avoid the obstacle If the control threshold value is exceeded, the vehicle is controlled in accordance with a deviation quantity so as to return to a position where the control threshold avoids being exceeded However, even if a risky oncoming vehicle is approaching the vehicle on the right, the vehicle is controllably moved toward the oncoming vehicle Thus, disadvantageously, a driver has a sense of fear or discomfort A vehicle control apparatus according to the present invention includes a calculation section configured to calculate a first risk level present on the left of the vehicle and a second risk level present on the right of the vehicle, a setting section configured to set a first control threshold for the left of the vehicle based on the first risk level and to set a second control threshold for the right of the vehicle based on the second risk level, a change section configured to change at least one of the first and second control thresholds based on the first and second risk levels, and a control section configured to control the vehicle based on the changed control threshold

Vehicle control apparatus

This paper aims at providing researchers and engineering professionals from the first step of solution development to the last step of solution deployment with a practical and comprehensive deep‐learning‐based solution for detecting construction vehicles. This paper places particular focus on the often‐ignored last step of deployment. Our first phase of solution development involved data preparation, model selection, model training, and model validation. Given the necessarily small‐scale nature of construction vehicle image datasets, we propose as detection model an improved version of the single shot detector MobileNet, which is suitable for embedded devices. Our study's second phase comprised model optimization, application‐specific embedded system selection, economic analysis, and field implementation. Several embedded devices were proposed and compared. Results including a consistent above 90% mean average precision confirm the superior real‐time performance of our proposed solutions. Finally, the practical field implementation of our proposed solutions was investigated. This study validates the practicality of deep‐learning‐based object detection solutions for construction scenarios. Moreover, the detailed information provided by the current study can be employed for several purposes such as safety monitoring, productivity assessments, and managerial decision making. Disciplines Construction Engineering and Management Comments This is the pre-peer reviewed version of the following article: Arabi, Saeed, Arya Haghighat, and Anuj Sharma. \"A deep‐learning‐based computer vision solution for construction vehicle detection.\" Computer‐Aided Civil and Infrastructure Engineering 35, no. 7 (2020): 753-767, which has been published in final form at DOI: 10.1111/mice.12530. This article may be used for non-commercial purposes in accordance with Wiley Terms and Conditions for Self-Archiving. Posted with permission. This article is available at Iowa State University Digital Repository: https://lib.dr.iastate.edu/ccee_pubs/246

https://lib.dr.iastate.edu/cgi/viewcontent.cgi?article=1246&context=ccee_pubs

A deep‐learning‐based computer vision solution for construction vehicle detection

Next generations of compute-intensive real-time applications in automotive systems will require more powerful computing platforms. One promising power-efficient solution for such applications is to use clustered many-core architectures. However, ensuring that real-time requirements are satisfied in the presence of contention in shared resources, such as memories, remains an open issue. This work presents a novel contention-free execution framework to execute automotive applications on such platforms. Privatization of memory banks together with defined access phases to shared memory resources is the backbone of the framework. An Integer Linear Programming (ILP) formulation is presented to find the optimal time-triggered schedule for the on-core execution as well as for the access to shared memory. Additionally a heuristic solution is presented that generates the schedule in a fraction of the time required by the ILP. Extensive evaluations show that the proposed heuristic performs only 0.5% away from the optimal solution while it outperforms a baseline heuristic by 67%. The applicability of the approach to industrially sized problems is demonstrated in a case study of a software for Engine Management Systems.

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Contention-Free Execution of Automotive Applications on a Clustered Many-Core Platform

Long-range indoor navigation requires guiding robots with noisy sensors and controls through cluttered environments along paths that span a variety of buildings. We achieve this with PRM-RL, a hierarchical robot navigation method in which reinforcement learning (RL) agents that map noisy sensors to robot controls learn to solve short-range obstacle avoidance tasks, and then sampling-based planners map where these agents can reliably navigate in simulation; these roadmaps and agents are then deployed on robots, guiding them along the shortest path where the agents are likely to succeed. In this article, we use probabilistic roadmaps (PRMs) as the sampling-based planner, and AutoRL as the RL method in the indoor navigation context. We evaluate the method with a simulation for kinematic differential drive and kinodynamic car-like robots in several environments, and on differential-drive robots at three physical sites. Our results show that PRM-RL with AutoRL is more successful than several baselines, is robust to noise, and can guide robots over hundreds of meters in the face of noise and obstacles in both simulation and on robots, including over 5.8 km of physical robot navigation.

Long-Range Indoor Navigation With PRM-RL

In 2005 DARPA labeled the realization of viable autonomous vehicles (AVs) a grand challenge; a short time later the idea became a moonshot that could change the automotive industry. Today, the question of safety stands between reality and solved. Given the right platform the CPS community is poised to offer unique insights. However, testing the limits of safety and performance on real vehicles is costly and hazardous. The use of such vehicles is also outside the reach of most researchers and students. In this paper, we present F1/10: an open-source, affordable, and high-performance 1/10 scale autonomous vehicle testbed. The F1/10 testbed carries a full suite of sensors, perception, planning, control, and networking software stacks that are similar to full scale solutions. We demonstrate key examples of the research enabled by the F1/10 testbed, and how the platform can be used to augment research and education in autonomous systems, making autonomy more accessible.

F1/10: An Open-Source Autonomous Cyber-Physical Platform

Supporting OpenMP on a multi-cluster embedded MPSoC

Several recent many-core accelerators have been architected as fabrics of tightly-coupled shared memory clusters. A hierarchical interconnection system is used -- with a crossbar-like medium inside each cluster and a network-on-chip (NoC) at the global level -- which make memory operations non-uniform (NUMA). Nested parallelism represents a powerful programming abstraction for these architectures, where a first level of parallelism can be used to distribute coarse-grained tasks to clusters, and additional levels of fine-grained parallelism can be distributed to processors within a cluster. This paper presents a lightweight and highly optimized support for nested parallelism on cluster-based embedded many-cores. We assess the costs to enable multi-level parallelization and demonstrate that our techniques allow to extract high degrees of parallelism.

Fast and lightweight support for nested parallelism on cluster-based embedded many-cores

We present a variation-tolerant tasking technique for tightly-coupled shared memory processor clusters that relies upon modeling advance across the hardware/software interface. This is implemented as an extension to the OpenMP 3.0 tasking programming model. Using the notion of Task-Level Vulnerability (TLV) proposed here, we capture dynamic variations caused by circuit-level variability as a high-level software knowledge. This is accomplished through a variation-aware hardware/software codesign where: (i) Hardware features variability monitors in conjunction with online per-core characterization of TLV metadata; (ii) Software supports a Task-level Errant Instruction Management (TEIM) technique to utilize TLV metadata in the runtime OpenMP task scheduler. This method greatly reduces the number of recovery cycles compared to the baseline scheduler of OpenMP [22], consequently instruction per cycle (IPC) of a 16-core processor cluster is increased up to 1.51× (1.17× on average). We evaluate the effectiveness of our approach with various number of cores (4,8,12,16), and across a wide temperature range(ΔT=90°C).

Variation-tolerant OpenMP tasking on tightly-coupled processor clusters

Cluster-based architectures are increasingly being adopted to design embedded many-cores. These platforms can deliver very high peak performance within a contained power envelope, provided that programmers can make effective use the available parallel cores. This is becoming an extremely difficult task, as embedded applications are growing in complexity and exhibit irregular and dynamic parallelism. The OpenMP tasking extensions represent a powerful abstraction to capture this form of parallelism. However, efficiently supporting it on cluster-based embedded SoCs is not easy, because the fine-grained parallel workload present in embedded applications can not tolerate high memory and run-time overheads. In this paper we present our design of the runtime support layer to OpenMP tasking for an embedded shared memory cluster, identifying key aspects to achieving performance and discussing important architectural support to removing major bottlenecks.

Paolo Burgio

Papers

F1/10: An Open-Source Autonomous Cyber-Physical Platform

Supporting OpenMP on a multi-cluster embedded MPSoC

Fast and lightweight support for nested parallelism on cluster-based embedded many-cores

Variation-tolerant OpenMP tasking on tightly-coupled processor clusters

Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters