The Fifth Edition of this academically rigorous text provides a comprehensive treatment of analog integrated circuit analysis and design starting from the basics and through current industrial practices. The authors combine bipolar, CMOS and BiCMOS analog integrated-circuit design into a unified treatment that stresses their commonalities and highlights their differences. The comprehensive coverage of the material will provide the student with valuable insights into the relative strengths and weaknesses of these important technologies.

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Analysis and Design of Analog Integrated Circuits

A multipath nested structure which overcomes the bandwidth reduction in the conventional nested structure by appending an independent feedforward path for high frequencies is presented. At low frequencies, the opamp behaves as a three-stage nested Miller-compensated amplifier, while at high frequencies the opamp has the nature and bandwidth of a two-stage amplifier with simple pole splitting. In this fashion, the concept circumvents the classical DC-gain/high-frequency-performance dilemma. No pole-zero doubles occur, because the two regions of operation can be independently and closely matched, unaffected by variations in the parameters of the IC process in which the amplifier is fabricated. >

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A 100-MHz 100-dB operational amplifier with multipath nested Miller compensation structure

A bipolar operational amplifier (OA) with rail-to-rail input and output ranges which can operate at supply voltages down to 1 V is presented. At this supply voltage, the input offset voltage is typically 1.0 mV in an input common-mode voltage range that extends beyond both supply rails for about 300 mV, with a common-mode rejection ratio (CMRR) between 38 and 100 dB, depending on conditions. The output voltage can reach both supply rails within 100 mV, the output current is limited to +or-10 mA, the voltage gain is 100 dB, and the bandwidth is 450 kHz. The die is 2.5*5.5 mm/sup 2/. Qualities such as offset, input-bias current, and CMRR are improved when the supply voltage is increased and the dynamic level shift is autonomically turned off. The OA has been protected against unintentional reversal of the output signal when the inputs are substantially overdriven. The output stage of the circuit consists of two full complementary composite transistors, whose HF characteristics have been improved by internal Miller compensation and linearization of the transconductance. >

Low-voltage operational amplifier with rail-to-rail input and output ranges

Compact low-voltage power-efficient operational amplifiers are described that are very suitable as very-large-scale-integration library cells because of the small die area of 0.08 mm/sup 2/ and the minimum supply voltage of 1.8 V. A key part of the circuit is the rail-to-rail class-AB output stage with folded mesh feedback control that combines power efficiency with operation down to 1.8 V and allows sufficient gain in a compact two-stage topology. A version with rail-to-rail input stage features a rail-to-rail input range for supply voltages down to 2.5 V. The dc gain of the op amps is more than 80 db while driving 10 k/spl Omega/, and the unity-gain frequency is 4 MHz with phase margin of 67/spl deg/ while driving 5 pF. The equivalent input noise voltage is 38 nV//spl radic/(Hz) at a frequency of 100 kHz. The amplifiers have been implemented in a standard digital 1.6-/spl mu/m complementary metal-oxide-semiconductor process.

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Compact low-voltage power-efficient operational amplifier cells for VLSI

It is shown that a generalized interpretation of the translinear (TL) principle leads quite naturally to an extension to MOS circuits. It is shown that two distinct classes of TL circuits exist, one suitable for bipolar and the other for MOS implementation. The MOS-translinear (MTL) circuit principle is derived and an initial classification of simple MTL circuits is proposed. Some examples are given of MTL circuits synthesizing nonlinear functions. >

Generalized translinear circuit principle

A low-distortion class AB output stage with improved stability suitable for monolithic power amplifiers (P/sub 0/>or=40 W) is described. The concept has been verified on a 12-W breadboard version as well as on a partly integrated prototype, and is supported by computer simulations for P/sub 0/>or=40 W A biasing control law which guarantees predictable conduction of both output transistors at all times is implemented. This reduces crossover distortion and allows the customary quasi-p-n-p compound transistor to be eliminated, thus also improving stability. Linearity is improved by use of local negative feedback. Phase margin is improved by application of high-frequency feedforward. Measured phase margin is around 60 degrees and total harmonic distortion for a load of 7 Omega is about -80 dB at 20 kHz. >

A low-distortion output stage with improved stability for monolithic power amplifiers

The first (T 1 ) and the second (T 2 ) output transistor of an amplifier arrangement are push-pull driven by means of a drive circuit (10) having two transistors (T 11 , T 12 ) which are each loaded by a current source (T 13 , T 14 ). Currents which are a measure of the currents flowing through the first (T 1 ) and the second (T 2 ) output transistor are generated by first (20) and second (30) current measuring means. These currents are applied to a negative feedback means (40) which controls the current intensity of the current sources (T 13 , T 14 ) in such a way that the harmonic mean value of the currents flowing through the first (T 1 ) and the second (T 2 ) output transistor is substantially equal to a reference value.

Amplifier arrangement with quiescent current control

An amplifier circuit in which a first amplifier (A1) and a second amplifier (A2) are protected against short-circuits by a protection apparatus which includes a first device (M1), a second device (M2), a third device (M3) and a protection device (B). For this purpose the first device and the second device generate four signals (s1, s2, s3, s4) related to an equal number of currents (i1, i2, i3, i4), which currents are related to a first or a second load current in the first amplifier or in the second amplifier. In order to control the protection device (B), the third device generates at least two control signals (r1, r2) related to the signal currents (s1, s2, s3, s4), use being made of the equality of the load currents in the absence of short-circuits.

Amplifier with short-circuit protection

In order to boost the output power of a first amplifier (A1) a second amplifier (A2) can increase the supply voltage difference across the first amplifier (A1) However, variations of the supply voltage difference result in comparatively high distortion In order to minimize this distortion while maintaining the output power, a signal-follower circuit generates a direct voltage lever which tracks a first output signal of the first amplifier, for which purpose the signal-follower circuit is driven by a third amplifier, which compares the first output signal with a reference signal

Amplifier arrangement with output power boosting

An input signal (Vin) is applied to a first amplifier (A1) and a second amplifier (A2) via a circuit (M), which amplifiers are both coupled to an output terminal (U) to supply an output voltage (Vuit). For this purpose the circuit (M) generates two mutually complementary signals which are related to the output signal (Vuit) and the maximum signal values corresponding to the individual output signals of the first amplifier (A1) and the second amplifier (A2). The output signal to be supplied (Vuit) consequently dictates which amplifier (A1, A2) is driven into full conduction.

Pieter Buitendijk

Papers

A low-distortion output stage with improved stability for monolithic power amplifiers

Amplifier arrangement with quiescent current control

Amplifier with short-circuit protection

Amplifier arrangement with output power boosting

Multiple-amplifier control arrangement