Showing papers by "R.D. Blanton published in 2005"

Diagnosis of arbitrary defects using neighborhood function extraction

Abstract: We present a methodology for diagnosing arbitrary defects in digital integrated circuits (ICs). Rather than using one or a set of fault models in a cause-effect or effect-cause approach, our methodology derives defect behavior from, the test set, the circuit and its response, and the physical neighbors that surround a potential defect location. The defect locations themselves are identified using a model-independent stage. The methodology enables accurate identification of defect location and behavior through validation via simulation using passing and additional diagnostic test patterns. A byproduct of our methodology is the distinction that can be made among stuck-fault equivalencies which results in improved diagnostic resolution. Several types of shorts and opens are used to demonstrate the applicability of our approach to the diagnosis of arbitrary defects.

Specification test compaction for analog circuits and MEMS [accelerometer and opamp examples]

Abstract: Testing a non-digital integrated system against all of its specifications can be quite expensive due to the elaborate test application and measurement setup required We propose to eliminate redundant tests by employing /spl epsi/-SVM based statistical learning The application of the proposed methodology to an operational amplifier and a MEMS accelerometer reveal that redundant tests can be statistically identified from a complete set of specification-based tests, with negligible error Specifically, after eliminating five of eleven specification-based tests for an operational amplifier, the defect escape and yield loss is small at 06% and 09%, respectively For the accelerometer, defect escape of 02% and yield loss of 01% occurs when the hot and cold tests are eliminated For the accelerometer, this level of compaction would reduce test cost by more than half