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Rajeevan Chandel

Researcher at National Institute of Technology, Hamirpur

Publications -  115
Citations -  766

Rajeevan Chandel is an academic researcher from National Institute of Technology, Hamirpur. The author has contributed to research in topics: CMOS & Very-large-scale integration. The author has an hindex of 13, co-authored 108 publications receiving 585 citations. Previous affiliations of Rajeevan Chandel include Indian Institute of Technology Roorkee.

Papers
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Comprehensive Model for High-Speed Current-Mode Signaling in Next Generation MWCNT Bundle Interconnect Using FDTD Technique

TL;DR: In this paper, the performance of the current-mode signaling (CMS) scheme in carbon nanomaterial based multiwall carbon nanotube (MWCNT) bundle on-chip interconnect using finite-difference time-domain (FDTD) technique is investigated.
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Condition assessment of power transformers based on multi-attributes using fuzzy logic

TL;DR: The proposed fuzzy model is flexible, accurate and easy to implement for determining the overall health index of the working transformers and shall prove to be very useful to the utility managers and power utilities.
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A Novel Unified Model for Copper and MLGNR Interconnects Using Voltage- and Current-Mode Signaling Schemes

TL;DR: In this article, a unified model for conventional copper and futuristic multilayer graphene nanoribbon (MLGNR) interconnects, based on a finite-difference time-domain (FDTD) technique has been proposed.
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An Efficient Crosstalk Model For Coupled Multiwalled Carbon Nanotube Interconnects

TL;DR: In this article, an unconditionally stable finite-difference time-domain (USFDTD) technique has been used for the crosstalk model in coupled multiwalled carbon nanotube (MWCNT) interconnects.

A new approach to design low power cmos flash a/d converter

TL;DR: A 4-bit flash analog to digital converter for low power SoC application and can reduce about 78% in power consumption compared with the traditional flash ADC.