An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in accordance with the shape of the contact hole is formed, and the wiring portion of the contact hole is likely to have a depression compared with other portions. A penetrating opening is formed by irradiating a light-transmitting insulating film with laser light having high intensity and a pulse high in repetition frequency. A plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to have an even thickness of a wiring by reducing a partial depression and also to ensure contact resistance.

Semiconductor device and method for manufacturing the same, and electric device

Low dielectric constant polymers for microelectronics

Modern computer microprocessor chips are marvels of engineering complexity. For the current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 cm2 and more than 10 000 m of wiring connecting and powering these devices distributed over 9-10 wiring levels. This represents quite an advance from the first INTEL 4004B microprocessor chip introduced in 1971 with 10 μm minimum dimensions and 2 300 transistors on the chip! It has been disclosed that advanced microprocessor chips at the 32 nm node will have more than 2 billion transistors.1 For instance, Figure 1 shows a sectional 3D image of a 90 nm IBM microprocessor, containing several hundred million integrated devices and 10 levels of interconnect wiring, designated as the back-end-of-the-line (BEOL). Since the invention of microprocessors, the number of active devices on a chip has been exponentially increasing, approximately doubling every two years. This trend was first described in 1965 by Gordon Moore,2 although the original discussion suggested doubling the number of devices every year, and the phenomenon became popularly known as Moore’s Law. This progress has proven remarkably resilient and has persisted for more than 50 years. The enabler that has permitted these advances is known as scaling, that is, the reduction of minimum device dimensions by lithographic advances (photoresists, tooling, and process integration optimization) by ∼30% for each device generation.3 It allowed more active devices to be incorporated in a given area and improved the operating characteristics of the individual transistors. It should be emphasized that the earlier improvements in chip performance were achieved with very few changes in the materials used in the construction of the chips themselves. The increase of performance with scaling * Corresponding author. E-mail: gdubois@us.ibm.com. † IBM Almaden Research Center. ‡ Stanford University. Willi Volksen received his B.S. in Chemistry (magna cum laude) from New Mexico Institute of Mining and Technology in 1972 and his Ph.D. in Chemistry/Polymer Science from the University of Massachusetts, Lowell, in 1975. He then joined the research group of Prof. Harry Gray/Dr. Alan Rembaum at the California Institute of Technology as a postdoctoral fellow and upon completion of the one-year appointment joined Dr. Rembaum at the Jet Propulsion Laboratory as a Senior Chemist in 1976. In 1977 Dr. Volksen joined the IBM Research Division at the IBM Almaden Research Center in San Jose, CA, where he is an active research staff member in the Advanced Materials Group of the Science and Technology function.

Low dielectric constant materials.

Process gas discharged from a bypass pipe to a gas exhaust system can be prevented from diffusing back to the inside of a process chamber without having to install a dedicated vacuum pump at the downstream side of the bypass pipe. The substrate processing apparatus includes a process chamber accommodating a substrate, a gas supply system supplying process gas from a process gas source to the process chamber for processing the substrate, a gas exhaust system configured to exhaust the process chamber, two or more vacuum pumps installed in series at the gas exhaust system, and a bypass pipe connected between the gas supply system and the gas exhaust system. The most upstream one of the vacuum pumps is a mechanical booster pump, and the bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the mechanical booster pump.

Substrate Processing Apparatus

Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. In one aspect of the present invention, an organosilicate glass film is exposed to an ultraviolet light source wherein the film after exposure has an at least 10% or greater improvement in its mechanical properties (i.e., material hardness and elastic modulus) compared to the as-deposited film.

Mechanical Enhancement of Dense and Porous Organosilicate Materials by UV Exposure

A method of forming a low dielectric constant interlayer dielectric film on a substrate by reacting, under chemical vapor deposition conditions sufficient to deposit the film on the substrate, an organosilicon precursor comprising a silyl ether, a silyl ether oligomer, or an organosilicon compound containing one or more reactive groups, to form an interlayer dielectric film having a dielectric constant of 3.5 or less. The films formed by the above method.

Organosilicon precursors for interlayer dielectric films with low dielectric constants

A porous organosilica glass (OSG) film consists of a single phase of a material represented by the formula Si v O w C x H y F z , where v+w+x+y+z=100%, v is from 10 to 35 atomic %, w is from 10 to 65 atomic %, x is from 5 to 30 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %, wherein the film has pores and a dielectric constant less than 2.6. The film is provided by a chemical vapor deposition method in which a preliminary film is deposited from organosilane and/or organosiloxane precursors and pore-forming agents (porogens), which can be independent of, or bonded to, the precursors. The porogens are subsequently removed to provide the porous film. Compositions, such as kits, for forming the films include porogens and precursors. Porogenated precursors are also useful for providing the film.

Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants

A method for restoring a dielectric constant of a layer of a silicon-containing dielectric material having a first dielectric constant and at least one surface, wherein the first dielectric constant of the layer of silicon-containing dielectric material has increased to a second dielectric constant, the method comprising the steps of: contacting the at least one surface of the layer of silicon-containing dielectric material with a silicon-containing fluid; and exposing the at least one surface of the layer of silicon-containing dielectric material to an energy source selected from the group consisting of: UV radiation, heat, and an electron beam, wherein the layer of silicon-containing dielectric material has a third dielectric constant that is lower than the second dielectric constant after exposing the layer of silicon-containing dielectric material to the energy source.

Activated chemical process for enhancing material properties of dielectric films

A method for providing a porous organosilica glass (OSG) film that consists of a single phase of a material represented by the formula SivOwCxHyFz, v+w+x+y+z=100%, v is from 10 to 35 atomic %, w is from 10 to 65 atomic %, x is from 5 to 30 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %, wherein the film has pores and a dielectric constant less than 2.6 is disclosed herein. In one aspect of the present invention, the film is provided by a chemical vapor deposition method in which a preliminary film is deposited from organosilane and/or organosiloxane precursors and pore-forming agents (porogens), which can be independent of, or alternatively bonded to, the precursors. The porogens are subsequently removed to provide the porous film. In another aspect of the present invention, porogenated precursors are used for providing the film.

Raymond Nicholas Vrtis

Papers

Mechanical Enhancement of Dense and Porous Organosilicate Materials by UV Exposure

Organosilicon precursors for interlayer dielectric films with low dielectric constants

Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants

Activated chemical process for enhancing material properties of dielectric films

Methods for using porogens and/or porogenated precursors to provide porous organosilica glass films with low dielectric constants