High level synthesis (HLS) is gaining wider acceptance for hardware design due to its higher productivity and better design space exploration features. In recent years, HLS techniques and design flows have also advanced significantly, and as a result, many new FPGA designs are developed with HLS. However, despite many studies using HLS, the size and complexity of such applications remain generally small, and it is not well understood how to design and optimize for HLS with large, complex reference code. Typical HLS benchmark applications contain somewhere between 100 to 1400 lines of code and about 20 sub-functions, but typical input applications may contain many times more code and functions. To study such complex applications, we present a case study using HLS for a full H.264 decoder: an application with over 6000 lines of code and over 100 functions. We share our experience on code conversion for synthesizability, various HLS optimizations, HLS limitations while dealing with complex input code, and general design insights. Through our optimization process, we achieve 34 frames/s at 640x480 resolution (480p). To enable future study and benefit the research community, we open-source our synthe- sizable H.264 implementation.

High Level Synthesis of Complex Applications: An H.264 Video Decoder

Closed-loop stimulation of many neurological disorders, such as epilepsy, is an emerging technology and regarded as a promising alternative for surgical and drug treatment. In this paper, a real-time seizure detection algorithm based on STFT and support vector machine (SVM) and its field-programmable gate array (FPGA) implementation are proposed. With a two-stage patient-specific channel selection and feature selection mechanism, those redundant and uncorrelated spectral features are removed from the entire feature set. The evaluation results on CHB-MIT epilepsy database show that the mean detection latency of the proposed algorithm is 6 s, the sensitivity is 98.4%, and the false detection rate is 0.356/h. The performance of our proposed algorithm is comparable to other existing seizure detection algorithms. Moreover, we implement the proposed seizure detection algorithm on Xilinx Zynq-7000 XC7Z020 with high level synthesis. Each classification of the input electroencephalography signal can be finished within 313 $\mu \text{s}$ , and the power consumption of the programmable logic is only 380 mW at 100 MHz. In hardware implementation, an optimization strategy for the nested-loop structure within nonlinear SVM is proposed to improve pipeline efficiency. Compared with existing method, the experimental result shows that our method can speed up the nonlinear SVM by $1.70\times $ , $1.53\times $ , $1.37\times $ , and $1.26\times $ with the unroll factor equal to 1–4 at the same DSP utilization rate. The evaluation results affirm the possibility of integrating the proposed algorithm and FPGA implementation into a wearable seizure control device.

Hardware Design of Real Time Epileptic Seizure Detection Based on STFT and SVM

A universal voltage-mode filter configuration employing a voltage differencing inverting buffered amplifier (VDIBA), two capacitors and a resistor is proposed. The presented structure can realize all the five standard biquadratic filters: low-pass, high-pass, band-pass, band-reject and all-pass, without changing the circuit topology. The proposed filter circuit also provides the following advantageous features, not available simultaneously in any of the single active element/device based universal biquad realizing all the five filter responses known earlier so far: (i) independent electronic tuning of natural angular frequency (ω
 0) and bandwidth (BW), (ii) no requirement of any element matching condition or inversion of input signal(s) (as needed in most of the earlier reported structures), and (iii) low active and passive sensitivities. Moreover, even the internal structure of the new building block is possibly the simplest among all recently introduced new building blocks. The workability of the proposed filter has been confirmed by SPICE simulations using 0.18 μm technology.

Voltage-Mode New Universal Biquad Filter Configuration Using a Single VDIBA

As COVID-19 reached Turkey in March 2020, all universities switched to e-learning in a very short period. Computer and software engineering (CE/SE) undergraduate students studying at university campuses have switched to e-learning. This paper seeks to understand the e-learning experience of CE/SE undergraduate students. A questionnaire was created and applied to CE/SE undergraduate students in Turkish universities. The data were analyzed using quantitative and qualitative techniques. The questionnaire received 290 usable responses. The highlights from the findings include: the participants (1) used video recordings intensively for e-learning and found them useful; (2) found face-to-face lectures more beneficial compared to digital live lectures; (3) used external online resources to improve their learning performance in courses; (4) thought that the materials and methods utilized for assessment should be adapted to e-learning for a better and fair evaluation; (5) perceived significantly less instructor support and classmate interaction and collaboration in e-learning compared to on-campus education settings; (6) rated their perceived satisfaction from e-learning as 2.85, slightly under the mid-level of the 5-point Likert scale; (7) perceived instructor support, student interaction and collaboration, and student autonomy as noteworthy factors in high-quality e-learning.

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An assessment of student satisfaction with e-learning: An empirical study with computer and software engineering undergraduate students in Turkey under pandemic conditions.

A laboratory pedagogy interweaving weekly student portfolios with onsite formative electronic laboratory assessments (ELAs) is developed and assessed within the laboratory component of a required core course of the electrical and computer engineering (ECE) undergraduate curriculum. The approach acts to promote student outcomes, and neutralize academic integrity violations, while refocusing instructor and teaching assistant roles toward high-gain instructional activities, such as personalized student tutoring. A mixed-method study evaluated the learning effectiveness and student satisfaction using biweekly ELAs versus traditional laboratory reports in a large-enrollment ( ${N}=68$ ) undergraduate computer engineering laboratory course. The results of the evaluation indicate statistically significant effects on both learning outcomes and student satisfaction from the use of formative assessments in laboratory delivery, which were corroborated by the instructor’s reflections. Students in the ELA with tutoring enabled delivery cohort performed better on the post-test and were more satisfied with the laboratory assessment design and assistance received in laboratory than those in the control cohort. The findings offer a promising alternative for ECE and engineering laboratory instruction that fosters gains in practical skills and content mastery.

Elevating Learner Achievement Using Formative Electronic Lab Assessments in the Engineering Laboratory: A Viable Alternative to Weekly Lab Reports

This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.

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System-on-Chip Design Using High-Level Synthesis Tools

Distance learning extends classroom access to students who are not physically present in the classroom. There areadditional challenges when distance learning is applied in a laboratory environment. These challenges come from twobroad categories: the ways in which students collaborate/communicate and the ways to virtualize the devices they use. Inthis investigation, a real-time collaborative educational framework is presented to address both the technical and ambientchallenges. Multiple senior level laboratory design courses in computer engineering are included in the test trials. Analysisof how well students perform in the collaborative remote laboratory environment is given. Iterative refinement is discussedin order to ensure that remote laboratories do not negatively impact students’ learning experience. Experimental trialssuggest that there is a change in social dynamic that students work in when conducting experiments in a laboratory. Acarefully designed social component is needed to create a successful team based learning experience in the laboratory.

Transforming computer engineering laboratory courses for distance learning and collaboration

Distance learning using internet as q communication medium has been successful for instructional education. The paradigm of instructional education deals with a real time interaction between a tutor and students. The next phase of internet powered distance education is to enable laboratory based education. This can be achieved by providing an interactive, collaborative experience and live access to the equipment while an experiment is being conducted. The key objective of this study is to provide remote access capability for engineering laboratories and create cyber-enabled, hands-on laboratory environments. The primary challenges for a cyber-enabled laboratory include technological issues related to communication infrastructure as well as non-technical issues such as determining collaborative interaction among remote students. Based on these challenges, we have evaluated and developed software & hardware components to provide a streamlined, web-centric laboratory experience for remote access students.

Richard Hanley

Papers

System-on-Chip Design Using High-Level Synthesis Tools

Transforming computer engineering laboratory courses for distance learning and collaboration

Collaborative learning and teamwork over the web