Part I: Background and Fundamentals Introduction, Mohamed Gad-el-Hak, University of Notre Dame Scaling of Micromechanical Devices, William Trimmer, Standard MEMS, Inc., and Robert H. Stroud, Aerospace Corporation Mechanical Properties of MEMS Materials, William N. Sharpe, Jr., Johns Hopkins University Flow Physics, Mohamed Gad-el-Hak, University of Notre Dame Integrated Simulation for MEMS: Coupling Flow-Structure-Thermal-Electrical Domains, Robert M. Kirby and George Em Karniadakis, Brown University, and Oleg Mikulchenko and Kartikeya Mayaram, Oregon State University Liquid Flows in Microchannels, Kendra V. Sharp and Ronald J. Adrian, University of Illinois at Urbana-Champaign, Juan G. Santiago and Joshua I. Molho, Stanford University Burnett Simulations of Flows in Microdevices, Ramesh K. Agarwal and Keon-Young Yun, Wichita State University Molecular-Based Microfluidic Simulation Models, Ali Beskok, Texas A&M University Lubrication in MEMS, Kenneth S. Breuer, Brown University Physics of Thin Liquid Films, Alexander Oron, Technion, Israel Bubble/Drop Transport in Microchannels, Hsueh-Chia Chang, University of Notre Dame Fundamentals of Control Theory, Bill Goodwine, University of Notre Dame Model-Based Flow Control for Distributed Architectures, Thomas R. Bewley, University of California, San Diego Soft Computing in Control, Mihir Sen and Bill Goodwine, University of Notre Dame Part II: Design and Fabrication Materials for Microelectromechanical Systems Christian A. Zorman and Mehran Mehregany, Case Western Reserve University MEMS Fabrication, Marc J. Madou, Nanogen, Inc. LIGA and Other Replication Techniques, Marc J. Madou, Nanogen, Inc. X-Ray-Based Fabrication, Todd Christenson, Sandia National Laboratories Electrochemical Fabrication (EFAB), Adam L. Cohen, MEMGen Corporation Fabrication and Characterization of Single-Crystal Silicon Carbide MEMS, Robert S. Okojie, NASA Glenn Research Center Deep Reactive Ion Etching for Bulk Micromachining of Silicon Carbide, Glenn M. Beheim, NASA Glenn Research Center Microfabricated Chemical Sensors for Aerospace Applications, Gary W. Hunter, NASA Glenn Research Center, Chung-Chiun Liu, Case Western Reserve University, and Darby B. Makel, Makel Engineering, Inc. Packaging of Harsh-Environment MEMS Devices, Liang-Yu Chen and Jih-Fen Lei, NASA Glenn Research Center Part III: Applications of MEMS Inertial Sensors, Paul L. Bergstrom, Michigan Technological University, and Gary G. Li, OMM, Inc. Micromachined Pressure Sensors, Jae-Sung Park, Chester Wilson, and Yogesh B. Gianchandani, University of Wisconsin-Madison Sensors and Actuators for Turbulent Flows. Lennart Loefdahl, Chalmers University of Technology, and Mohamed Gad-el-Hak, University of Notre Dame Surface-Micromachined Mechanisms, Andrew D. Oliver and David W. Plummer, Sandia National Laboratories Microrobotics Thorbjoern Ebefors and Goeran Stemme, Royal Institute of Technology, Sweden Microscale Vacuum Pumps, E. Phillip Muntz, University of Southern California, and Stephen E. Vargo, SiWave, Inc. Microdroplet Generators. Fan-Gang Tseng, National Tsing Hua University, Taiwan Micro Heat Pipes and Micro Heat Spreaders, G. P. "Bud" Peterson, Rensselaer Polytechnic Institute Microchannel Heat Sinks, Yitshak Zohar, Hong Kong University of Science and Technology Flow Control, Mohamed Gad-el-Hak, University of Notre Dame) Part IV: The Future Reactive Control for Skin-Friction Reduction, Haecheon Choi, Seoul National University Towards MEMS Autonomous Control of Free-Shear Flows, Ahmed Naguib, Michigan State University Fabrication Technologies for Nanoelectromechanical Systems, Gary H. Bernstein, Holly V. Goodson, and Gregory L. Snider, University of Notre Dame Index

The MEMS Handbook

Silicon carbide (SiC) offers significant advantages for power-switching devices because the critical field for avalanche breakdown is about ten times higher than in silicon. SiC power devices have made remarkable progress in the past five years, demonstrating currents in excess of 100 A and blocking voltages in excess of 19000 V. In this paper we describe the latest progress in three classes of SiC devices: diodes (p-i-n and Schottky), transistors (junction field-effect transistor, metal-oxide-semiconductor field-effect transistor, and bipolar junction transistor), and thyristors (gate turn-off).

SiC power-switching devices-the second electronics revolution?

The first high voltage npn bipolar junction transistors (BJTs) in 4H-SiC have been demonstrated. The BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 m/spl Omega//spl middot/cm/sup 2/ at room temperature (I/sub C/=2.7 A @ V/sub CE/=2 V for a 1 mm/spl times/1.4 mm active area), which outperforms all SiC power switching devices reported to date. Temperature-stable current gain was observed for these devices. This is due to the higher percent ionization of the deep level acceptor atoms in the base region at elevated temperatures, which offsets the effects of increased minority carrier lifetime at high temperatures. These transistors show a positive temperature coefficient in the on-resistance characteristics, which will enable easy paralleling of the devices.

1800 V NPN bipolar junction transistors in 4H-SiC

Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.

Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making

Silicon carbide power devices having trench-based charge coupling regions include a silicon carbide substrate having a silicon carbide drift region of first conductivity type (e.g., N-type) and a trench therein at a first face thereof. A uniformly doped silicon carbide charge coupling region of second conductivity type (e.g., an in-situ doped epitaxial P-type region) is also provided in the trench. This charge coupling region forms a P-N rectifying junction with the drift region that extends along a sidewall of the trench. The drift region and charge coupling region are both uniformly doped at equivalent and relatively high net majority carrier doping concentrations (e.g., 1×10 17 cm −3 ) so that both the drift region and charge coupling region can be depleted substantially uniformly when blocking reverse voltages. This combination of preferred drift and charge coupling regions improves the electric field profile in the drift region to such an extent that very low forward on-state drift region resistance can be achieved simultaneously with very high reverse blocking voltage capability. Silicon carbide switching devices that can advantageously use the preferred combination of drift and charge coupling regions include Schottky barrier rectifiers (SBRs), junction field effect transistors (JFETs) and metal-oxide-semiconductor field effect transistors (MOSFETs).

Silicon carbide power devices having trench-based silicon carbide charge coupling regions therein

A static induction transitor (40; 100; 150) having a silicon carbide substrate (42; 42'; 102; 152) upon which is deposited a silicon carbide layer arrangement (44; 103; 154). The layer arrangement has a plurality of spaced gate regions (60; 108; 166) for controlling current flow from a source region (54; 110; 152) to a drain region (42; 42'; 102; 164) vertically spaced from the source region by a drift layer (48; 114; 182). The pitch distance p between gate regions is 1 to 5 micrometres and the drift layer thickness d is also 1 to 5 micrometres. In one embodiment the source regions (54) are positioned alternatively with the gate regions (60) and are formed in a top layer (50) of high doping concentration. In another embodiment the source regions (110) are ion implanted in the layer arrangement. The transisor may include a dual oxide layer (62; 70; 116; 124; 168; 176) covering gate and source or drain regions, and contacts (86; 64; 66) for the drain, source and gate regions may be located on the same side of the substrate member (42'). To reduce electric field concentration at the edge of the transistor guard rings (134) or an implanted region (136) may be provided surrounding the source and gate regions, or drain regions (164) may be provided in respective mesa structures (162).

Silicon carbide static induction transistor structures

A static induction transistor fabricated of silicon carbide, preferably 6H polytype, although any silicon carbide polytype may be used. The preferred static induction transistor is the recessed Schottky barrier gate type. Thus, a silicon carbide substrate is provided. Then, a silicon carbide drift layer is provided upon the substrate, wherein the drift layer has two spaced-apart protrusions or fingers which extend away from the substrate. Each protrusion of the drift layer has a source region of silicon carbide provided thereon. A gate material is then provided along the drift layer between the two protrusions. A conductive gate contact is provided upon the gate material and a conductive source contact is provided upon each source region. A conductive drain contact is provided along the substrate. Other gate types for the static induction transistor are contemplated. For example, a planar Schottky barrier gate may be employed. Furthermore, recessed or planar MOS gates may be utilized, as may a PN junction gate.

Silicon carbide static induction transistor

A static induction transistor having source, drain and gate regions. Channel regions are defined between adjacent gates and a drift region is defined from the ends of the channel regions to the drain. The channel and drift regions have predetermined doping concentrations with the doping concentration of the channel regions being greater than the doping concentration of the drift region.

Static induction transistor

A static induction transistor includes a substrate and a drift layer with different doping levels At least two mesas are formed on the drift layer and a heavily doped region is positioned on a top surface of each of the mesas A gate contact extends along a bottom of a recess between the mesas and along a side of each of the mesas forming the recess The gate contact also extends along a portion of the top surface of each of the mesas In one embodiment of the invention, a notch is formed in the top surface of the mesas between the gate contact and the heavily doped region

Richard R. Siergiej

Papers

Silicon carbide static induction transistor structures

Silicon carbide static induction transistor

Static induction transistor

Static induction transistors

4H-SiC Gate Turn-Off (GTO) Thyristor Development