Reconfigurable Computing. Accelerating Computation with Field-Programmable Gate Arrays by Maya B. Gokhale and Paul S. Graham Springer, 2005, 238 pp. ISBN-13 978-0387-26105-8, $87.20 Reconfigurable Computing Accelerating Computation with Field-Programmable Gate Arrays is an expository and easy to digest book. The authors are recognized leaders with many years of experience on the field of reconfigurable computing. The book is written so that non-specialists can understand the principles, techniques and algorithms. Each chapter has many excellent references for interested readers. It surveys methods, algorithms, programming languages and applications targeted to reconfigurable computing. Automatic generation of parallel code from a sequential program on conventional micro-processor architectures remains an open problem. Nevertheless, a wide range of computationally intensive applications have benefited from many tools developed to tackle such a problem. For RC, it is even a much harder problem (perhaps 10x and up) and intense research is being devoted to make RC a common-place practical tool. The aim of the authors is threefold. First, guide the readers to know current issues on HLL for RC. Second, help the readers understand the intricate process of algorithmic-to-hardware compilation. And third, show that, even though this process is painful, if the application is suitable for RC the gains in performance are huge. The book is divided into two parts. The first part contains four chapters about reconfigurable computing and languages. Chapter 1 presents an introduction of RC, contrasting conventional fixed instruction microprocessors with RC architectures. This chapter also contains comprehensive reference material for further reading. Chapter 2 introduces reconfigurable logic devices by explaining the basic architecture and configuration of FPGAs. Chapter 3 deals with RC systems by discussing how parallel processing is achieved on reconfigurable computers and also gives a survey of RC systems today. Then, in chapter 4, languages, compilation, debugging and their related manual vs. automatic issues are discussed. The second part of the book comprises five chapters about applications of RC. Chapter 5 and 6 discuss digital signal and image processing applications. Chapter 7 covers the application of RC to secure network communications. The aim of Chapter 8 is to discuss some important bioinformatics applications for which RC is a good candidate, their algorithmic problems and hardware implementations. Finally, Chapter 9 covers two applications of reconfigurable supercomputers. The first one is a simulation of radiative heat transfer and the second one models large urban road traffic. This book is neither a technical nor a text book, but in the opinion of this reviewer, it is an excellent state-of-the-art review of RC and would be a worthwhile acquisition by anyone seriously considering speeding up a specific application. On the downside, it is somewhat disappointing that the book does not contain more information about HLL tools that could be used to help close the gap between traditional HPC community and the raw computing power of RC. Edusmildo Orozco, Department of Computer Science, University Of Puerto Rico at Rio Piedras.

Reconfigurable Computing. Accelerating Computation with Field-Programmable Gate Arrays

RTM using effective boundary saving: A staggered grid GPU implementation

In clouds and data centers, GPU servers which consist of multiple GPUs are widely deployed. Current state-of-the-art GPU scheduling algorithm are "static" in assigning applications to different GPUs. These algorithms usually ignore the dynamics of the GPU utilization and are often inaccurate in estimating resource demand before assigning/running applications, so there is a large opportunity to further load balance and to improve GPU utilization. Based on CUDA (Compute Unified Device Architecture), we develop a runtime system called DCUDA which supports "dynamic" scheduling of running applications between multiple GPUs. In particular, DCUDA provides a realtime and lightweight method to accurately monitor the resource demand of applications and GPU utilization. Furthermore, it provides a universal migration facility to migrate "running applications" between GPUs with negligible overhead. More importantly, DCUDA transparently supports all CUDA applications without changing their source codes. Experiments with our prototype system show that DCUDA can reduce 78.3% of overloaded time of GPUs on average. As a result, for different workloads consisting of a wide range applications we studied, DCUDA can reduce the average execution time of applications by up to 42.1%. Furthermore, DCUDA also reduces 13.3% energy in the light load scenario.

DCUDA: Dynamic GPU Scheduling with Live Migration Support

GPUs has been widely used in scientific computing, as by offering exceptional performance as by power-efficient hardware. Its position established in high-performance and scientific computing communities has increased the urgency of understanding the power cost of GPU usage in accurate measurements. For this, the use of internal sensors are extremely important. In this work, we employ the GPU sensors to obtain high-resolution power profiles of real and benchmark applications. We wrote our own tools to query the sensors of two NVIDIA GPUs from different generations and compare the accuracy of them. Also, we compare the power profile of GPU with CPU using IPMItool.

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Analysis of GPU Power Consumption Using Internal Sensors

In graphics processing unit ( GPU ) computing community, bitonic mergesort (BM) is recognized as one of the most investigated sorting algorithms. It is specially designed for parallel architectures, requires minor inter-process communication, can be implemented in-place, and is logically appropriate for single instructions multiple data platforms. In addition, GPUs have shown tremendous improvements in power and performance efficiency and thus have become essential ingredients in pursuit of the prospective exascale systems whose major obstacle is the excessive power consumption. In a recent research work, we found that fundamental software building blocks can offer a reasonable amount of power and energy saving that can offer new ways to tackle the power obstacle of the prospective exascale systems. We evaluated average peak power , average energy , and average kernel runtime of BM under various workloads and compared it with advanced quicksort (AQ) . The results showed that BM outperformed AQ based on all the three metrics in most cases. In this paper, we further investigate BM to identify the factors that result in its underlying power and energy efficiency advantage over AQ. We analyze the power and energy efficiency of BM and AQ based on their performance evaluation on NVIDIA K40 GPU. The performance of both the algorithms is investigated using various experiments offered by NVIDIA Nsight Visual Studio .

Analyzing Power and Energy Efficiency of Bitonic Mergesort Based on Performance Evaluation

Energy consumption is one of the great villains in high-performance processing when applied to large clusters that continuously run certain applications. Seismic migration applications are targets of this type of processing, since this feature denotes a need to apply complex models that are continuously run to evaluate drilling of petroleum wells. This work describes an analysis tool of energy consumption of a seismic application applied to FPGA architecture for a real Brazilian industry. A comparative study with the traditional multi-core and with GPGPU architectures is performed and results indicate an increase in efficiency/Joule of about 23 and 1.5 times higher respectively. Experiments performed with the Marmousi model revels an error about 3.7% when compared with measured values.

Energy Estimation Tool FPGA-based Approach for Petroleum Industry

The recent increase in computing power of FPGAs has allowed its use in areas such as seismic data processing. Additionally, besides the capability of performing computations in parallel way, FPGAs also support application-specific number representations. In this type of application, in order to achieve better performance, instead of using the floating-point standard, usually the processing and storage of data is done using the fixed point standard. However, the change of representation can cause a degradation in the quality of the results. In the petroleum industry, a seismic image of poor quality can represent an erroneous interpretation of the subsurface, resulting in catastrophic losses. For this reason, it is essential that the quality of data obtained from the seismic data processing for low precision can be evaluated within reliable technical criteria. In this paper, a real case study was used in order to evaluate the efficiency of two different metrics applied to this seismic application based on RTM algorithm. The main strategy is to explore the precision reduction in terms of SNR (Signal-to-Noise Ratio) and UIQI (Universal Image Quality Index) metrics, in order to improve the performance of the system. Results show a performance gain of 50% compared with the architecture implemented in hardware using floating point standart IEE754.

Performance Evaluation Model based on Precision Reduction and FPGAs Applied to Seismic Modeling

Hardware accelerators such as GPGPUs and FPGAs have been used as an alternative to the conventional CPU in scientific computing applications and have shown significant performance improvements. In this context, this work presents an FPGA-based solution that explores efficiently the reuse of data and parallelization in both space and time domains for the first computational stage of the RTM (Reverse Time Migration) algorithm, the seismic modeling. We also implemented the same algorithm for CPU architectures and GPGPU and our results demonstrate that the FPGA-based approach can be a viable solution to improve performance. Experimental results show a speedup of 1.668 times compared with GPGPU and 25.79 times compared to CPU. Results were evaluated with the Marmousi velocity model, considering the same parameters in all approaches.

Rodrigo Gandra

Papers

Analysis of GPU Power Consumption Using Internal Sensors

Energy Estimation Tool FPGA-based Approach for Petroleum Industry

Performance Evaluation Model based on Precision Reduction and FPGAs Applied to Seismic Modeling

FPGA-based Accelerator to Speed-up Seismic Applications