scispace - formally typeset
R

Rosenbluth Mark B

Researcher at Tilera

Publications -  3
Citations -  202

Rosenbluth Mark B is an academic researcher from Tilera. The author has contributed to research in topics: Parallel processing (DSP implementation) & Component (UML). The author has an hindex of 1, co-authored 3 publications receiving 202 citations.

Papers
More filters
Patent

Computing in parallel processing environments

TL;DR: In this article, a processor is coupled to a communication network among the cores, and a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores.
Patent

Hardware engine for configuration register setup

TL;DR: In this paper, the steering register setup memory is used to store steering configuration data and steering logic to steer the generated requests responsively to the steering configuration registers, where the processor is configured to write the steering config data to the register-setup memory.
Patent

Write reordering in a multiprocessor system

TL;DR: In this article, a multiprocessor device includes cores and at least one ingress-write ordering circuitry (IWOC) including first and second counters associated with first-and second-destinations.