Modern computers are based on the von Neumann architecture in which computation and storage are physically separated: data are fetched from the memory unit, shuttled to the processing unit (where computation takes place) and then shuttled back to the memory unit to be stored. The rate at which data can be transferred between the processing unit and the memory unit represents a fundamental limitation of modern computers, known as the memory wall. In-memory computing is an approach that attempts to address this issue by designing systems that compute within the memory, thus eliminating the energy-intensive and time-consuming data movement that plagues current designs. Here we review the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, their resistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation. We examine the different digital, analogue, and stochastic computing schemes that have been proposed, and explore the microscopic physical mechanisms involved. Finally, we discuss the challenges in-memory computing faces, including the required scaling characteristics, in delivering next-generation computing. This Review Article examines the development of in-memory computing using resistive switching devices.

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In-memory computing with resistive switching devices

This article reviews static and dynamic interfacial effects in magnetism, focusing on interfacially-driven magnetic effects and phenomena associated with spin-orbit coupling and intrinsic symmetry breaking at interfaces. It provides a historical background and literature survey, but focuses on recent progress, identifying the most exciting new scientific results and pointing to promising future research directions. It starts with an introduction and overview of how basic magnetic properties are affected by interfaces, then turns to a discussion of charge and spin transport through and near interfaces and how these can be used to control the properties of the magnetic layer. Important concepts include spin accumulation, spin currents, spin transfer torque, and spin pumping. An overview is provided to the current state of knowledge and existing review literature on interfacial effects such as exchange bias, exchange spring magnets, spin Hall effect, oxide heterostructures, and topological insulators. The article highlights recent discoveries of interface-induced magnetism and non-collinear spin textures, non-linear dynamics including spin torque transfer and magnetization reversal induced by interfaces, and interfacial effects in ultrafast magnetization processes.

https://link.aps.org/accepted/10.1103/RevModPhys.89.025006

Interface-induced phenomena in magnetism

The discovery of the spin-torque effect has made magnetic nanodevices realistic candidates for active elements of memory devices and applications. Magnetoresistive effects allow the read-out of increasingly small magnetic bits, and the spin torque provides an efficient tool to manipulate - precisely, rapidly and at low energy cost - the magnetic state, which is in turn the central information medium of spintronic devices. By keeping the same magnetic stack, but by tuning a device's shape and bias conditions, the spin torque can be engineered to build a variety of advanced magnetic nanodevices. Here we show that by assembling these nanodevices as building blocks with different functionalities, novel types of computing architecture can be envisaged. We focus in particular on recent concepts such as magnonics and spintronic neural networks.

Spin-torque building blocks

技術解説 IEEE Computer

Magnetic nanostructures are being developed for use in many aspects of our daily life, spanning areas such as data storage, sensing and biomedicine. Whereas patterned nanomagnets are traditionally two-dimensional planar structures, recent work is expanding nanomagnetism into three dimensions; a move triggered by the advance of unconventional synthesis methods and the discovery of new magnetic effects. In three-dimensional nanomagnets more complex magnetic configurations become possible, many with unprecedented properties. Here we review the creation of these structures and their implications for the emergence of new physics, the development of instrumentation and computational methods, and exploitation in numerous applications.

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Three-dimensional nanomagnetism

Quoting the International Technology Roadmap for Semiconductors (ITRS) 2009 Emerging Research Devices section, 'Nanomagnetic logic (NML) has potential advantages relative to CMOS of being non-volatile, dense, low-power, and radiation-hard. Such magnetic elements are compatible with MRAM technology, which can provide input–output interfaces. Compatibility with MRAM also promises a natural integration of memory and logic. Nanomagnetic logic also appears to be scalable to the ultimate limit of using individual atomic spins.' This article reviews progress toward complete and reliable NML systems. More specifically, we (i) review experimental progress toward fundamental characteristics a device must possess if it is to be used in a digital system, (ii) consider how the NML design space may impact the system-level energy (especially when considering the clock needed to drive a computation), (iii) explain—using both the NML design space and a discussion of clocking as context—how reliable circuit operation may be achieved, (iv) highlight experimental efforts regarding CMOS friendly clock structures for NML systems, (v) explain how electrical I/O could be achieved, and (vi) conclude with a brief discussion of suitable architectures for this technology. Throughout the article, we attempt to identify important areas for future work.

https://iopscience.iop.org/article/10.1088/0953-8984/23/49/493202/pdf

Nanomagnet logic: progress toward system-level integration.

The nanomagnet logic (NML) devices considered here are variants of proposed components for the edge-driven, quantum-dot cellular automata device architecture, where the position of electrons on quantum dots was suggested as a mechanism for representing binary state. To control NML circuit components (e.g., gates and lines), to date, externally generated magnetic fields have served as a clock. The clock is used to make the magnets in a circuit ensemble transition to a metastable state, so fringing fields from individual devices can set the state of a neighboring device in accordance with a new input. However, such a clocking scheme is obviously not extensible to chip-level systems. For NML to be a viable candidate for digital systems, a mechanism for simultaneously modulating the energy barriers of a group of devices must be implemented “on-chip,” and guarantee unidirectional dataflow from circuit input to circuit output. We have experimentally demonstrated a CMOS-compatible clock, and used it to reevaluate all of the NML constructs required for a functionally complete logic set. All possible input combinations to said constructs were successfully considered. Experiments were designed to promote unidirectional dataflow.

On-Chip Clocking of Nanomagnet Logic Lines and Gates

We discuss the experimental demonstration of non-majority, two-input, nanomagnet logic (NML) AND and OR gates. While gate designs still can incorporate the symmetric, rounded-rectangle magnets used in the three-input majority gate experiments by Imre (2006 Science 311 205–8), our new designs also leverage magnets with an edge that has a well-defined 'slant'. In rectangular and ellipsoid nanomagnets, the easy axis of the device coincides with its longer edge. For a magnet with a slanted edge, the easy and hard axes are 'tilted', and magnetic fields applied along the (geometrical) hard axis alone can set the easy axis magnetization state. This switching phenomenon can be employed to realize NML Boolean logic gates with both reduced footprints and critical path delays. Experimental demonstrations of two-input AND and OR gates are supported by corresponding micromagnetic simulations with temperature effects associated with a 300 K environment. Simulations suggest that the time evolution of experimentally demonstrated structures is correct, and that designs can also tolerate clock field misalignment. Additionally, simulations suggest that a slanted-edge 'compute magnet' can (i) be driven by two anti-ferromagnetically ordered lines of NML devices (for input) and (ii) drive an anti-ferromagnetically ordered line (for output). Both are essential if slanted-edge devices are to be used in NML circuits. We conclude with a discussion of extensibility and scaling prospects for shape-based computation with nanomagnets.

https://iopscience.iop.org/article/10.1088/0953-8984/23/5/053202/pdf

Non-majority magnetic logic gates: a review of experiments and future prospects for 'shape-based' logic.

Verification and validation (V&V) techniques are used in agent-based modeling (ABM) to determine whether the model is an accurate representation of the real system. Docking is a form of V&V that tries to align multiple simulation models. In a previous paper, we described the docking process of an ABM that simulates the life cycle of Anopheles gambiae. Results showed that the implementations were docked for adult but not for aquatic mosquito populations. In this paper, following the ‘Divide and Conquer’ paradigm, we compartmentalize the simulation world to prohibit the propagation of errors between compartments. Using four separate implementations that sprung from the same core model, we describe a series of docking experiments, analyze the results, and show how they lead to a successful dock. The complete four-fold docking encompasses verification between the four implementations, as well as validation against the core model with respect to these implementations.

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Divide and conquer: a four-fold docking experience of agent-based models

Field-coupled nanomagnets can offer significant energy savings at iso-performance versus CMOS equivalents. Magnetic logic could be integrated with CMOS, operate in environments that CMOS cannot, and retain state without power. Clocking requirements lead to inherently pipelined circuits, and high throughput further improves application-level performance. However, bit conflicts -- that will occur in defect free, pipelined ensembles -- can make non-volatile logic volatile. Assuming a field-based clock, we present hardware designs to improve steady state non-volatility, and explain how design enhancements could increase clock energy. We then suggest materials-related design levers that could simultaneously deliver non-volatility and low clock energy.

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S. Kurtz

Papers

Nanomagnet logic: progress toward system-level integration.

On-Chip Clocking of Nanomagnet Logic Lines and Gates

Non-majority magnetic logic gates: a review of experiments and future prospects for 'shape-based' logic.

Divide and conquer: a four-fold docking experience of agent-based models

Making non-volatile nanomagnet logic non-volatile