A four-terminal model for a long-channel depletion-mode MOS transistor including both the diffusion and the drift components of the current along the channel is developed. The theory, which is derived in the gradual channel hypothesis, has been built-up by considering both Poisson's equation and the current-continuity equation. The model is able to describe, without discontinuities, the dc drain current in the enhancement, depletion, and subpinchoff regimes of operation of the device. It is shown that pinchoff and zero drain conductance are naturally achieved as the drain voltage increases, while in the subpinchoff regime the drain current exponentially depends on gate voltage and is mainly due to the diffusion component. Finally, it is found that mobility degradation effects due to the normal component of the electric field can easily be taken into account and it is shown that experimental data favorably compare with the proposed model.

Analysis of the depletion-mode MOSFET including diffusion and drift currents

Junctionless, or accumulation-mode, metal–oxide–semiconductor field-effect transistors (MOSFETs), where the channel and source/drain doping types are the same, have attracted growing interests because of their simpler fabrication processes. However, carrier transport properties, in particular, mobility characteristics, in the junctionless silicon-on-insulator (SOI) MOSFETs have been less studied. Although higher mobility in accumulation-mode SOI MOSFETs has been reported, the physical mechanisms of the higher mobility have not yet been clarified. In this work, the physical mechanisms of higher mobility in accumulation-mode MOSFETs have been investigated. We fabricated junctionless SOI MOSFETs with a channel doping concentration of 1×1017 cm-3 and an SOI body thickness of 48 nm whose mobility is greater than the bulk universal mobility in spite of the high doping concentration in the channel. The drain current consists of two components: one in the accumulation layer and the other in the SOI body. The mobility of each component is evaluated separately. As a result, it is revealed that the total mobility is the weighted mean of the two mobility components, where carrier concentration is the weight.

Experimental Study on Electron Mobility in Accumulation-Mode Silicon-on-Insulator Metal--Oxide--Semiconductor Field-Effect Transistors

The author presents simple analytical solutions for the potential and the fringing field, especially for charge-coupled devices (CCDs). A description of the influence of the insulation layer in terms of an equivalent substrate thickness is used to find expressions for the optimal charge transport depth and charge transfer time for small charge packets in CCDs. The thickness of the insulation layer is accounted for by a scaling rule that is a nonlinear function of the thickness and dielectric constant of the insulation layer and the lateral dimensions of the device. Compared with computer simulations this technique gives good results for surface potentials that are found in CCDs. The results are used to calculate the optimal transfer depth and minimal transfer time in bulk and surface CCDs. >

Simple analytical expressions for the fringing field and fringing-field-induced transfer time in charge-coupled devices

An analytical predictor/CAD model for a short-channel buried-channel MOSFET is reported. The proposed model can be used to predict the anomalous threshold voltage shift associated with the short-channel buried-channel MOSFET. The characteristic is shown to be caused by the shifting of the operational mode from the surface to the buried channel. Current equations which are applicable to the short-channel buried-channel device are derived. For the purpose of circuit simulations, a computationally efficient CAD current model is also developed. The current characteristics calculated from the model equation are found to be in good agreement with experimental results. By using the CAD current equations, a charge model for the intrinsic buried-channel device is formulated. The charge model equations can be used to model the intrinsic capacitances for SPICE simulations.

A Predictor/CAD Model for Buried-Channel MOS Transistors

This paper presents two separate carrier-mobility models for the I - V characteristics of buried-channel MOSFETs. One model considers oxide-semiconductor interface scattering for carrier motion in the surface accumulation layer; the other model considers the scattering of carrier motion within the finite thickness of the neutral buried channel. Based on these two carrier-mobility models, the I - V characteristic model of buried-channel MOSFETs is derived analytically without considering the small-geometry effects. Comparisons between the developed I - V characteristic model and the experimental results of the fabricated buried-channel MOSFETs have been made. It has been shown that the mobility models developed enable us to accurately simulate the I - V characteristics of buried-channel MOSFETs operated over wide ranges of gate-source and back-gate biases.

Mobility models for the I–V characteristics of buried-channel MOSFETs

Small-geometry buried-channel depletion MOSFETs (BCD-MOSFETs) are characterized based on an analytical model that includes short-channel, narrow-channel, and carrier-velocity saturation effects. The drain current is calculated based on the surface electrons induced by the gate-bias voltage and the buried-channel junction FET. The narrow-channel effect is modeled not only by the additional depletion-layer charges created by a fringing-field effect in the field region, but also by the effective channel width as a function of gate-bias voltage. Surface-electron mobility is modeled as a function of the vertical and lateral electrical fields created by the gate-bias and drain voltages, while bulk-electron mobility is described as a function of the lateral electric field due to the drain voltage. Theoretical results on drain current are in good agreement with experimental results.

S. Morimoto

Papers

Analytical model and characterization of small-geometry buried-channel depletion MOSFETs