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Salessawi Ferede Yitbarek

Researcher at University of Michigan

Publications -  7
Citations -  309

Salessawi Ferede Yitbarek is an academic researcher from University of Michigan. The author has contributed to research in topics: Encryption & Memory management. The author has an hindex of 5, co-authored 7 publications receiving 220 citations. Previous affiliations of Salessawi Ferede Yitbarek include Intel.

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Proceedings ArticleDOI

ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks

TL;DR: A software-based defense, ANVIL, is developed, which thwarts all known rowhammer attacks on existing systems and is shown to be low-cost and robust, and experiments indicate that it is an effective approach for protecting existing and future systems from even advanced rowhAMmer attacks.
Proceedings ArticleDOI

Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors

TL;DR: Analysis of enhancements that have been introduced in DDR4 memory scramblers in the 6th generation Intel Core (Skylake) processors confirm modern stream ciphers such as ChaCha8 are sufficiently fast that it is now possible to completely overlap keystream generation with DRAM row buffer access latency, thereby enabling the creation of strongly encrypted DRAMs with zero exposed latency.
Proceedings ArticleDOI

Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn

TL;DR: This work takes secure system design on the offensive by continuously obfuscating information that attackers need but normal programs do not use, such as representation of code and pointers or the exact location of codeand data.
Proceedings ArticleDOI

Exploring specialized near-memory processing for data intensive operations

TL;DR: Evaluating the benefits of placing hardware accelerators at the bottom layer of a 3D stacked memory system compared to accelerators that are placed external to the memory stack shows that, for important data intensive kernels, near-memory accelerators inside a single 3D memory package provide 3x-13x speedup over a Quad-core Xeon processor.
Proceedings ArticleDOI

Reducing the overhead of authenticated memory encryption using delta encoding and ECC memory

TL;DR: This work replaces the parity bits in standard ECC by a combination of MAC and parity bits to provide both authentication and error correction and uses efficient integer encodings to reduce counter storage overhead by 6 × while enhancing application performance.