1. Introduction and overview 2. Film stress and substrate curvature 3. Stress in anisotropic and patterned films 4. Delamination and fracture 5. Film buckling, bulging and peeling 6. Dislocation formation in epitaxial systems 7. Dislocation interactions and strain relaxation 8. Equilibrium and stability of surfaces 9. The role of stress in mass transport.

Thin Film Materials: Stress, Defect Formation and Surface Evolution

This paper addresses the problem of stability analysis and control synthesis of switched systems in the discrete-time domain. The approach followed in this paper looks at the existence of a switched quadratic Lyapunov function to check asymptotic stability of the switched system under consideration. Two different linear matrix inequality-based conditions allow to check the existence of such a Lyapunov function. The first one is classical while the second is new and uses a slack variable, which makes it useful for design problems. These two conditions are proved to be equivalent for stability analysis. Investigating the static output feedback control problem, we show that the second condition is, in this case, less conservative. The reduction of the conservatism is illustrated by a numerical evaluation.

Stability analysis and control synthesis for switched systems: a switched Lyapunov function approach

With their working mechanisms based on ion migration, the switching dynamics and electrical behaviour of memristive devices resemble those of synapses and neurons, making these devices promising candidates for brain-inspired computing. Built into large-scale crossbar arrays to form neural networks, they perform efficient in-memory computing with massive parallelism by directly using physical laws. The dynamical interactions between artificial synapses and neurons equip the networks with both supervised and unsupervised learning capabilities. Moreover, their ability to interface with analogue signals from sensors without analogue/digital conversions reduces the processing time and energy overhead. Although numerous simulations have indicated the potential of these networks for brain-inspired computing, experimental implementation of large-scale memristive arrays is still in its infancy. This Review looks at the progress, challenges and possible solutions for efficient brain-inspired computation with memristive implementations, both as accelerators for deep learning and as building blocks for spiking neural networks.

Memristive crossbar arrays for brain-inspired computing

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power ( e.g. , mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g. , neuromorphic computing, hardware security, etc . In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

A review of emerging non-volatile memory (NVM) technologies and applications

Chemically reduced graphene oxide (RGO)/poly(diallylimethyammonium chloride) (PDDA) nanocomposite film sensor with high-performance humidity properties was reported in this paper. The film sensor was fabricated on flexible polyimide substrate with interdigital microelectrodes structure. By the layer-by-layer nano self-assembly approach, graphene oxide and PDDA were exploited to form hierarchical nanostructure, and then was partially reduced via solution-based chemically reduction for obtaining both conductivity and chemically active defect sites. The effect of hydrobromic acid treatment on the conductivity properties of PDDA/GO film was examined, further verifying the advantage of hydrobromic acid reduction. The humidity sensing properties of the presented nanocomposite film sensor, such as repeatability, hysteresis, stability, response–recovery characteristics, were investigated by exposing to the wide relative humidity range of 11–97% at room temperature. As a result, the sensor exhibited not only excellent sensing behavior to humidity, but also fast response–recovery time and good repeatability, highlighting the unique advantages of layer-by-layer nano self-assembly for film sensors fabrication. As last, the possible humidity sensing mechanism of the proposed sensor was discussed in detail.

Humidity-sensing properties of chemically reduced graphene oxide/polymer nanocomposite film sensor based on layer-by-layer nano self-assembly

A new oxide failure mode of ultrathin gate oxide is reported. During high constant current stressing, V/sub G/ variation with time shows two distinct modes, i.e., a stable mode and a fluctuation mode named as quasi-breakdown. Once the quasi-breakdown starts, gate current in low field abruptly increases. From the experimental results, it could be concluded that the quasi-breakdown occurs when injected electrons travel in the oxide conduction band ballistically. Localized physical damage near the Si/SiO/sub 2/ interface is believed to be the cause of the quasi-breakdown, The great increase of gate current after the quasi-breakdown was modeled by a superposition of F-N tunneling current and direct tunneling current with a finite series resistance, and a good agreement has been found. >

Quasi-breakdown of ultrathin gate oxide under high field stress

Technical Communique: A new stability analysis of switched systems

Challenges in scaling of semiconductor memory technologies are reviewed with the focus on DRAM and NAND Flash while demands for memory improvement in the ICT industry are increasing. This paper introduces evolutionary and revolutionary paths to overcome scaling challenges of current and emerging memory technologies along with some promising solutions.

Technology scaling challenges and opportunities of memory devices

A junctionless-accumulation-mode (JAM) p-channel MOSFET is successfully implemented based on a junction-isolated bulk FinFET for the first time. The JAM devices with a fin width of 16 nm show outstanding transfer characteristics: 1) subthreshold swing (SSmin) = 68 mV/dec; 2) drain-induced-barrier-lowering is 9 mV/V; and 3) ION/IOFF ratio >1 × 106. The JAM devices with smaller fin widths or longer gate lengths give superior short-channel characteristics and higher threshold voltages (Vth) due to their enhanced gate electrostatic controllability. The reverse back bias modulates Vth and SS favorably by virtue of a body-tied device, maintaining the substrate current due to junction leakage of <;1 × 10-11 A.

First Demonstration of Junctionless Accumulation-Mode Bulk FinFETs With Robust Junction Isolation

High-K (HK) and Metal-Gate (MG) transistor reliability is very challenging both from the standpoint of introduction of new materials and requirement of higher field of operation for higher performance. In this paper, key and unique HK+MG intrinsic transistor reliability mechanisms observed on 32nm logic technology generation is presented. We'll present intrinsic reliability similar to or better than 45nm generation.

Seok-Hee Lee

Papers

Quasi-breakdown of ultrathin gate oxide under high field stress

Technical Communique: A new stability analysis of switched systems

Technology scaling challenges and opportunities of memory devices

First Demonstration of Junctionless Accumulation-Mode Bulk FinFETs With Robust Junction Isolation

Reliability characterization of 32nm high-K and Metal-Gate logic transistor technology