A diverse spectrum of technology drivers such as improved thermal barriers, higher efficiency thermoelectric energy conversion, phase-change memory, heat-assisted magnetic recording, thermal management of nanoscale electronics, and nanoparticles for thermal medical therapies are motivating studies of the applied physics of thermal transport at the nanoscale. This review emphasizes developments in experiment, theory, and computation in the past ten years and summarizes the present status of the field. Interfaces become increasingly important on small length scales. Research during the past decade has extended studies of interfaces between simple metals and inorganic crystals to interfaces with molecular materials and liquids with systematic control of interface chemistry and physics. At separations on the order of ∼1 nm, the science of radiative transport through nanoscale gaps overlaps with thermal conduction by the coupling of electronic and vibrational excitations across weakly bonded or rough interface...

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Nanoscale thermal transport. II. 2003–2012

This article reviews the application of electric circuit methods for the analysis of pressure-driven microfluidic networks with an emphasis on concentration- and flow-dependent systems. The application of circuit methods to microfluidics is based on the analogous behaviour of hydraulic and electric circuits with correlations of pressure to voltage, volumetric flow rate to current, and hydraulic to electric resistance. Circuit analysis enables rapid predictions of pressure-driven laminar flow in microchannels and is very useful for designing complex microfluidic networks in advance of fabrication. This article provides a comprehensive overview of the physics of pressure-driven laminar flow, the formal analogy between electric and hydraulic circuits, applications of circuit theory to microfluidic network-based devices, recent development and applications of concentration- and flow-dependent microfluidic networks, and promising future applications. The lab-on-a-chip (LOC) and microfluidics community will gain insightful ideas and practical design strategies for developing unique microfluidic network-based devices to address a broad range of biological, chemical, pharmaceutical, and other scientific and technical challenges.

Design of pressure-driven microfluidic networks using electric circuit analogy

The authors report on synthesis and thermal properties of the electrically conductive thermal interface materials with the hybrid graphene-metal particle fillers. The thermal conductivity of resulting composites was increased by ∼500% in a temperature range from 300 K to 400 K at a small graphene loading fraction of 5-vol.-%. The unusually strong enhancement of thermal properties was attributed to the high intrinsic thermal conductivity of graphene, strong graphene coupling to matrix materials, and the large range of the length-scale—from nanometers to micrometers—of the graphene and silver particle fillers. The obtained results are important for the thermal management of advanced electronics and optoelectronics.

Thermal properties of the hybrid graphene-metal nano-micro-composites: Applications in thermal interface materials

Review of pool boiling enhancement by surface modification

A review of phase change materials for vehicle component thermal buffering

The drive for higher performance has led to greater integration and higher clock frequency of microprocessor chips. This translates into higher heat dissipation and, therefore, effective cooling of electronic chips is becoming increasingly important for their reliable performance. We systematically explore the limits for heat removal from a model chip in various configurations. First, the heat removal from a bare chip by pure heat conduction and convection is studied to establish the theoretical limit of heat removal from a bare die bound by an infinite medium. This is followed by an analysis of heat removal from a packaged chip by evaluating the thermal resistance due to individual packaging elements. The analysis results allow us to identify the bottlenecks in the thermal performance of current generation packages, and to motivate lowering of thermal resistance through the board-side for efficient heat removal to meet ever increasing reliability and performance requirements.

http://weble.upc.edu/ifsin/Block5/paper1.pdf

Thermal issues in next-generation integrated circuits

Effective cooling of electronic chips is crucial for reliability and performance of electronic devices. Steadily increasing power dissipation in both devices and interconnects motivate the investigation of chip-centric thermal management as opposed to traditional package-centric solutions. In this work, we explore the fundamental limits for heat removal from a model chip for various configurations. Temperature rise when the chip is embedded in an infinite solid is computed for different thermal conductivities of the medium to pin down the best that can be achieved with conduction based thermal management. Next, a chip attached to a spreader plate with convection boundary condition on top was considered. A brief review of interface thermal resistances and partitioning of overall thermal resistance is presented for current generation microprocessors. Based upon the analysis it is concluded that far-term cooling solutions might necessitate integration with chip/interconnect-stack to meet the challenges. In addition, this would require concurrent thermal and electrical design/fabrication of future high-performance microprocessors.© 2003 ASME

Thermal Issues in Next Generation Integrated Circuits

An electronic package comprising a semiconductor device, a heat spreader layer, and a thermal interface material layer located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer having heat conductive particles suspended therein. A portion of the particles are exposed on at least one non-planar surface of the resin layer such that the portion of exposed particles occupies a majority of a total area of a horizontal plane of the non-planar surface.

Thermal Interface Material Design for Enhanced Thermal Performance and Improved Package Structural Integrity

A technique to extract in-plane thermal conductivity of thin metallic films whose thickness is comparable to electron mean free path is described. Microscale constrictions were fabricated into gold films of thicknesses 43 nm and 131 nm. A sinusoidal voltage excitation across the constriction results in a local temperature rise. An existing technique known as scanning joule expansion microscopy, measures the corresponding periodic thermomechanical expansion with a 10 nm resolution and determines the local temperature gradient near the constriction. A three-dimensional finite-element simulation of the frequency-domain heat transfer fits the in-plane thermal conductivity to the measured data, finding thermal conductivities of 82±7.7 W/mK for the 43 nm film and 162±16.7 W/mKfor the 131 nm film, at a heating frequencies of 100 kHz and 90 kHz, respectively. These values are significantly smaller than the bulk thermal conductivity value of 318 W/mK for gold, showing the electron size effect due to the metal-dielectric interface and grain boundary scattering. The obtained values are close to the thermal conductivity values, which are derived from electrical conductivity measurements after using the Wiedemann-Franz law. Because the technique does not require suspended metal bridges, it captures true metal-dielectric interface scattering characteristics. The technique can be extended to other films that can carry current and result in Joule heating, such as doped single crystal or polycrystalline semiconductors.

Size Effect on the Thermal Conductivity of Thin Metallic Films Investigated by Scanning Joule Expansion Microscopy

Thermal management of handheld systems such as smart phones and tablet systems is becoming increasingly challenging due to increasing power dissipation. These mobile systems pose a significant challenge for implementation of traditional cooling schemes such as heat sinks and fans due to form factor limitations. Instead, new advanced cooling schemes have been developed. This article presents thermal model development from an analysis of today's smart phone thermal management schemes and application of these techniques to a tablet system. Application processor temperature rise and tablet skin temperature are reported for thermal enhancement simulations using this tablet system. Some guiding principles are provided for efficient thermal design of handheld systems.

Siva P. Gurrum

Papers

Thermal issues in next-generation integrated circuits

Thermal Issues in Next Generation Integrated Circuits

Thermal Interface Material Design for Enhanced Thermal Performance and Improved Package Structural Integrity

Size Effect on the Thermal Conductivity of Thin Metallic Films Investigated by Scanning Joule Expansion Microscopy

Generic thermal analysis for phone and tablet systems