The multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more DC sources and power-switching devices, and less THD, which in turn, increases the cost and size of the inverter. These drawbacks can be eliminated with the proposed hybrid Cascaded H-Bridge Multilevel Inverter with reduced components topology. As compared with the established MLI topologies the recommended topology having a reduced number of DC sources, power-switching devices, component count level factor, lesser TSV, more efficient, lesser THD, and cost-effective. The proposed MLI is a blend of a single-phase T-Type inverter and an H-Bridge module made of sub switches. This article incorporates the design and simulation of the multilevel inverter with staircase PWM technique. Further, the 9-level and 17-level MLI is examined with different combinational loads. The proposed inverter is stable during nonlinear loads, and it is well suited for FACTS and renewable energy grid-connected applications. An operational guideline has been explained with correct figures and tables. The Output voltage wave is realized in numerical simulation. Finally, the experimental demonstrations were performed by implementing a hardware prototype setup for both linear and nonlinear loads using the dSPACE controller laboratory.

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Design and Implementation of Seventeen Level Inverter With Reduced Components

Adaptive hill-climbing MPPT algorithms have superior performance as opposed to their conventional counterparts under medium-high irradiance. However, the performance of these hill-climbing algorithms remains mostly unknown under low irradiance condition. The low irradiance conditions are prominent in tropical countries during rainy seasons and niche PV applications. Additionally, several thin-film photovoltaic (PV) technologies have better efficiency under low irradiance conditions. Hence, the optimum operation of MPPT algorithms under low irradiance conditions is vital. In the real-time implementation, MPPT algorithms can fail to detect the incremental changes in voltage and current under low irradiance conditions. Hence, analog to digital converter (ADC) resolution becomes a critical constraint that governs the performance of hill-climbing (HC) MPPT algorithms. This work entails a detailed calculation to determine the perturbation step-sizes of the MPPT algorithms under a wide range of irradiance. Two distinct perturbation step-sizes are determined corresponding to the minimum and optimum change in voltage and current due to perturbation, that is sensed by the ADC. The authors also defined a general expression to determine the optimum digitized step-size for duty-based perturb and observe algorithm under low irradiance condition. This expression is formulated by considering the resolution of the ADC and the desirability of keeping the power oscillations at an acceptable level. Finally, the performance of eight hill-climbing algorithms for two distinct step-sizes is analyzed on a small-scale experimental prototype under both uniform and sudden changes in low values of irradiance. The statistical analysis validates that the adaptive HC drift-free MPPT algorithm outperforms other HC algorithms when implemented with the optimum perturbation step-size under low irradiance conditions.

Experimental Analysis of hill-climbing MPPT algorithms under low irradiance levels

Improved P&O MPPT algorithm with efficient open-circuit voltage estimation for two-stage grid-integrated PV system under realistic solar radiation

In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch) The topology can be used for asymmetrical voltage source configuration to generate seventeen voltage levels The extended topology is constructed by a series connection of the topology circuit to produce higher voltage levels with less voltage stress on the switches without modifying the existing structure Comparison is made with traditional and recently introduced topologies based on the number of power switches, dc sources, total blocking voltage of switches, and gate driver circuits, to prove the proposed topology’s superiority A simple nearest level modulation has been deployed as the switching scheme Validation on the viability of the proposed topology has been carried out through simulation and hardware experimental setup

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New Asymmetrical Modular Multilevel Inverter Topology With Reduced Number of Switches

High gain dc-dc converters are used in several applications which include solar photovoltaic system, switch-mode power supplies and fuel cells. In this paper, an ultra-high gain dc-dc boost converter is proposed and analyzed in detail. The converter has a gain of six times as compared with the boost converter. The high gain is achieved by utilizing switched inductors and switched capacitors. A modified voltage multiplier cell (VMC) with switched inductors is proposed. The converter has a single switch which makes its operation easy. Moreover, the voltage across the switch, diodes and capacitors are less than the output voltage which increases the overall efficiency of the converter. The converter performance in steady-state is analyzed in detail and it is compared with other latest high gain converters. The working of the converter in non-ideal conditions is also discussed in detail. The loss analysis is done using PLECS software by incorporating the real models of switches and diodes from the datasheet. To confirm and validate the working of the proposed converter a hardware prototype of 200 W is developed in the laboratory. The converter achieves high gain at low duty ratios and its performance is found to be good in open and closed loop conditions.

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A New Transformerless Ultra High Gain DC–DC Converter for DC Microgrid Application

This paper presents a new multilevel inverter topology with reduced active switches and total standing voltage. The proposed topology can generate a high number of voltage levels in the symmetric configuration. This topology intuitively generates positive and negative cycles without an additional H-bridge unit, which considerably reduces the total standing voltage of the inverter. A cascaded structure is developed from the proposed topology to create higher voltage levels. To show the novelty of the proposed topology, a thorough comparison between the available and the proposed topologies in terms of the number of switches, standing voltages, and dc-sources is presented. Furthermore, the power loss analysis is carried out for various load values. The feasibility of the proposed nine-level inverter is verified with simulation and experimental results.

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A Generalized Multilevel Inverter Topology With Reduction of Total Standing Voltage

This paper proposes a Resistance perturbation based maximum power point tracking (MPPT) with an adaptive control limit algorithm to extract the maximum power from solar photovoltaic (PV) array. This algorithm consists of two main functions, namely 1) resistance perturbation & observation (RP&O) and 2) adaptive resistance control (ARC) limit. The RP&O operates the PV array at maximum power point (MPP), and the ARC limit continuously monitors the resistance of the PV $R_{pv} $ to determine the operating limit of MPP. The ultimate aim of proposing this algorithm is to reduce the oscillations and improve MPP’s tracking performance for sudden variation in temperature and irradiance conditions. Furthermore, it does not require an expensive pyranometer or temperature sensor to track the MPP of the PV array. This paper also compares the proposed and conventional MPPT algorithm’s performance. Its validation results in both MATLAB/Simulink and experimental studies are presented under constant and sudden changes in irradiance conditions.

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An Adaptive Resistance Perturbation Based MPPT Algorithm for Photovoltaic Applications

For renewable sources application like smart grids, microgrids, etc. high voltage gain converter becomes a fundamental unit. In this article, a new hybrid circuit of zeta and boost converter based on active-quad-switched-inductor (AQSL) is proposed. The discontinuous input current in classical zeta circuit determines the less consumption of input source. However, the proposed hybrid zeta-boost converter provides a higher voltage gain with continuous input and output currents. It achieves higher voltage gain devoid of the high-frequency transformer, and multiple stages of diode and capacitor circuit. The mode of operation, boundary region, and non-ideal model of the proposed converter are presented. Design consideration and a comparison study with recent circuits are provided. The design circuitry of the proposed converter investigated and the functionality of the suggested circuit is validated.

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A New Hybrid Zeta-Boost Converter With Active Quad Switched Inductor for High Voltage Gain

The power converters are taking responsibility to produce high-quality output voltage and current waveforms from the various PV sources. Recently, PV applications focus on high-frequency ac power distribution (HF-AC-PD). In particular, dc/ac switched capacitor multilevel inverters (SCMLIs) significantly reduce the power conversion stages and components, which result in high conversion efficiency. This article proposes a new SCMLI topology with a reduced number of switches and a self-balanced floating capacitor (FC) voltage. The proposed topology is configured as a single dc source and three dc sources. The proposed topology generates thirteen level output voltage waveforms, and the output voltage ( $V_{o}$ ) is two times higher than the input voltage ( $V_{in}$ ). The discharging time is less than the recently suggested topologies. Furthermore, the voltage stress on switches is reduced to 50% concerning the load voltage. Thus, a remarkable reduction in the bulky size of the FC is achieved. The simulation results are discussed for different fundamental frequencies of 360 Hz, 400 Hz, and 1 kHz and considering various loads. The proposed converter prototype is designed in the laboratory for 2 kW, and the results are presented. The results show a good agreement in terms of total harmonic distortions, power loss, and efficiency.

Switched Capacitor-Based 13L Inverter Topology for High-Frequency AC Power Distribution System

https://onlinelibrary.wiley.com/doi/pdfdirect/10.1049/rpg2.12629

Sivakumar Selvam

Papers

A Generalized Multilevel Inverter Topology With Reduction of Total Standing Voltage

An Adaptive Resistance Perturbation Based MPPT Algorithm for Photovoltaic Applications

A New Hybrid Zeta-Boost Converter With Active Quad Switched Inductor for High Voltage Gain

Switched Capacitor-Based 13L Inverter Topology for High-Frequency AC Power Distribution System

DC‐DC parallel legs linked high gain converter for microgrid applications