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Somanath Majhi

Researcher at Indian Institute of Technology Guwahati

Publications -  145
Citations -  2702

Somanath Majhi is an academic researcher from Indian Institute of Technology Guwahati. The author has contributed to research in topics: Control theory & PID controller. The author has an hindex of 24, co-authored 139 publications receiving 2354 citations. Previous affiliations of Somanath Majhi include University of Sussex & Kaiserslautern University of Technology.

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Load frequency control of a realistic power system with multi-source power generation

TL;DR: In this paper, an optimal output feedback controller which uses only the output state variables is proposed to resolve the difficulty of access to all the state variables of a system and also their measurement is costly and difficult.
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Brief Obtaining controller parameters for a new Smith predictor using autotuning

TL;DR: A modified Smith predictor strategy is extended, which leads to significant improvements in its regulatory capacities for reference inputs and disturbances, and the proposed controller design method is compared with previously published approaches both for the setpoint response and for the load disturbance rejection.
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A new control scheme for PID load frequency controller of single-area and multi-area power systems

TL;DR: A new control structure with a tuning method to design a PID load frequency controller for power systems and the proposed method improves the load disturbance rejection performance significantly even in the presence of the uncertainties in plant parameters.
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Autotuning and controller design for processes with small time delays

TL;DR: In this paper, a set of general expressions derived from a single asymmetrical relay feedback test for online plant identification is derived, and conditions for the existence of limit cycles in unstable FOPDT and SOPDT processes are derived.
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Modified Smith predictor and controller for processes with time delay

TL;DR: In this article, a modified Smith predictor and a simple but very effective controller design procedure is proposed for time delay processes. And the controller has a simple structure whose high performance particularly for unstable and integrating process is clearly shown.